Stephen Y. H. Su

The Relationship Between Multivalued Switching Algebra and Boolean Algebra Under Different Definitions of Complement

The relationship between multivalued switching algebra and Boolean algebra is presented by introducing different definitions for the complements of multivalued variables. For every definition introduced, the paper points out which Boolean algebra theorems are valid for multivalued cases, which are invalid, and gives proofs to substantiate the claim. It is shown that DeMorgans theorem holds for all four definitions of complement given in this paper. One definition allows us to map the multivalued variables into binary variables. Under this definition, all axioms and theorems of Boolean algebra are satisfied and can be used for minimization of any multivalued switching function f. Illustrative examples for minimizing f and its complement f are given.

A New Approach to the Fault Location of Combinational Circuits

A systematic approach to the location of a single failure in a combinational logic network is presented. The method utilizes only the required tests and needs no fault table. The structure of the logic network is taken into consideration when selecting the tests to be applied. For tree networks, we start from the gate that generates a primary output and sequentially trace back through the stages of the network according to a fixed set of rules. At each stage we either locate the fault or determine the direction of the trace.

Identification of Multiple Stuck-Type Faults in Combinational Networks

This paper deals with the problem of identifying multiple stuck-type hardware failures in combinational switching networks. Our work is an extension of that of Poage, and Bossen and Hong, and we employ the cause-effect equation for representing faulty circuit behavior. We introduce the concept of solving simultaneous equations over check point variables. These check point solutions are studied in detail. From the solutions one can calculate the function realized by a faulty circuit. We outline an on-line testing procedure for constructing a test set for identifying a specific fault in a circuit to within an equivalence class. This procedure eliminates the need for precalculating a fault dictionary, which, in many instances, can be quite advantageous. We also outline how to apply these techniques to the following problems: 1) identifying redundancy; 2) determining the set of faults not detected by an arbitrary test set; and 3) constructing a complete fault dictionary.

Computer-Aided Synthesis or Multiple-Output Multilevel NAND Networks witk Fan-in and Fan-out Constraints

A straightforward efficient computer algorithm for synthesizing multiple-output NAND (NOR) switching networks is presented which takes practical fan-in and fan-out limitations of logic gates into account. The algorithm is highly iterative and hence is very suitable for realizing large-size switching functions by a digital computer. The algorithm has been programmed in Fortran and a great deal of statistical data has been obtained to demonstrate its efficiency in terms of gate count as well as computing time. It is also efficient for hand execution

computer simplification of multi-valued switching functions

Publisher Summary The technology has moved into the medium scale integration (MSI) and large scale integration (LSI) areas. One of the most important problems is the pin limitation of the integrated circuits. Multi-valued logic allows each input pin to accept and each output pin to deliver more information. For the same amount of information transfer, the total number of pins required in an integrated circuit chip containing multi-valued logic elements is less than that of an integrated circuit chip with binary elements. Recent development and future speculation of design automation have indicated that computer-aided logic design is the important goal to achieve. The minimization of switching functions by a digital computer has been found to be useful for designing random and array logic. For the functions with a large number of variables, the use of a computer for minimization becomes a must. This chapter discusses a cubical representation for multi-valued switching functions and, using this notation, computer-oriented algorithms are presented for simplifying multi-valued switching functions.