Subramanian S. Iyer

Heterojunction bipolar transistors using Si-Ge alloys

Advanced epitaxial growth techniques permit the use of pseudomorphic Si/sub 1-x/Ge/sub x/ alloys in silicon technology. The smaller bandgap of these alloys allows for a variety of novel band-engineered structures that promise to enhance silicon-based technology significantly. The authors discuss the growth and properties of pseudomorphic Si/sub 1-x/Ge/sub x/ structures and then focus on their applications, especially the Si/sub 1-x/Ge/sub x/-base heterojunction bipolar transistor (HBT). They show that HBTs in the Si/sub 1-x/Ge/sub x/ system allow for the decoupling of current gain and intrinsic base resistance. Such devices can be made by using a variety of techniques, including molecular-beam epitaxy and chemical vapor deposition. The authors describe the evolution of fabrication schemes for such HBTs and describe the DC and AC results obtained. They show that optimally designed HBTs coupled with advanced bipolar structures can provide performance leverage. >

Light emission from silicon

The possibility induction of light emission from silicon, an indirect bandgap material in which radiative transitions are unlikely, raises several interesting and technologically important possibilities, especially the fabrication of a truly integrated optoelectronic microchip. In this article, the natural considerations that constrain silicon from emitting light efficiently are examined, as are several engineered solutions to this limitation. These include intrinsic and alloy-induced luminescence; radiatively active impurities; quantum-confined structures, including zone folding and the recent developments in porous silicon; and a hybrid approach, the integration of direct bandgap materials onto silicon.

Silicon-germanium base heterojunction bipolar transistors by molecular beam epitaxy

We report the first SiGe base heterojunction Bipolar Transistors (HBT) The devices were fabricated using Molecular Beam Epitaxy (MBE), low temperature processing and different germanium contents. The transistors demonstrate current gain and show the expected increase in collector current as a result of reduced bandgap due to Ge incorporation in the base. A 6 times increase in collector current was measured for a 1000A base device containing 12% Ge, consistent with a bandgap shrinkage in the base of approximately 45 meV. For the homojunction transistors, base widths as thin as 800A were grown, corresponding to a neutral base width of only 500A. These devices have a 40% higher collector current than the equivalent devices with a 1000A base width.

Electrically programmable fuse (eFUSE) using electromigration in silicides

For the first time we describe a positive application of electromigration, as an electrically programmable fuse device (eFUSE). Upon programming, eFUSEs show a large increase in resistance that enable easy sensing. The transient device characteristics show that the eFUSE stays in a low resistance state during programming due to the local heating of the fuse link. The programming is enhanced by a device design that uses a large cathode which increases the temperature gradient and minimizes the effect of microstructural variations.

Sharp profiles with high and low doping levels in silicon grown by molecular beam epitaxy

We find that heavy adsorbed dopant layers, up to several tens of equivalent monolayers, can be made to produce heavily doped n (Sb) and p (Ga) layers in molecular beam epitaxy grown silicon. By preadjusting the adlayer concentration to the required value while temporarily arresting silicon growth, arbitrarily sharp profiles of any sequence of dopant type with very high or low levels can be grown. Examples are given of p+ i p+ and n++p+ pp+ structures grown with transition thickness L?300 A, and with controlled layer thicknesses of ∼1000 A. Such structures, difficult to achieve otherwise, should be ideal for fabrication of high‐frequency millimeter wave devices.

Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips

Electrical fuse (eFUSE) has become a popular choice to enable memory redundancy, chip identification and authentication, analog device trimming, and other applications. We will review the evolution and applications of electrical fuse solutions for 180 nm to 45 nm technologies at IBM, and provide some insight into future uses in 32 nm technology and beyond with the eFUSE as a building block for the autonomic chip of the future.

A Compact eFUSE Programmable Array Memory for SOI CMOS

Demonstrating a >10X density increase over traditional VLSI fuse circuits, a compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented using a 6.2 mum2 NiSix silicide electromigration ITIR cell in 65 nm SOI CMOS. A 20 mus programming time at 1.5 V is achieved by asymmetrical scaling of the fuse and a shared differential sensing scheme. Having zero process cost adder, eFUSE is fully compatible with standard VLSI manufacturing.

Embedded DRAM: technology platform for the Blue Gene/L chip

The Blue Gene®/L chip is a technological tour de force that embodies the system-on-a-chip concept in its entirety. This paper outlines the salient features of this 130-nm complementary metal oxide semiconductor (CMOS) technology, including the IBM unique embedded dynamic random access memory (DRAM) technology. Crucial to the execution of Blue Gene/L is the simultaneous instantiation of multiple PowerPC® cores, high-performance static random access memory (SRAM), DRAM, and several other logic design blocks on a single-platform technology. The IBM embedded DRAM platform allows this seamless integration without compromising performance, reliability, or yield. We discuss the process architecture, the key parameters of the logic components used in the processor cores and other logic design blocks, the SRAM features used in the L2 cache, and the embedded DRAM that forms the L3 cache. We also discuss the evolution of embedded DRAM technology into a higher-performance space in the 90-nm and 65-nm nodes and the potential for dynamic memory to improve overall memory subsystem performance.

Thermal relaxation of pseudomorphic Si‐Ge superlattices by enhanced diffusion and dislocation multiplication

Pseudomorphic Si/Si‐Ge strained layer superlattices are metastable and will relax to lower‐energy, less strained, states on thermal annealing. Such relaxation may occur by the generation of misfit dislocation or by compositional homogenization of the superlattice. The particular mechanism adopted is shown to depend on the initial dislocation density of the structures. In cases where a significant portion of the strain is accommodated by an array of misfit dislocations in the as‐grown state there is a propensity to relax by generating additional misfit dislocations. In the case of structures where only a very small fraction of the misfit is relieved by dislocations in the as‐grown state, additional relaxation does not involve the multiplication of dislocations but proceeds by the interdiffusion of Si and Ge towards the homogenizing of the superlattice structure. This strain‐enhanced diffusion has previously been observed in metals and we confirm its existence in semiconductor systems as well. The implicati...

Strain relaxation and ordering in SiGe layers grown on (100), (111), and (110) Si surfaces by molecular‐beam epitaxy

Si0.5Ge0.5/Si superlattices and thick Si0.5Ge0.5 layers grown on (100), (111), and (110) Si surfaces by molecular‐beam epitaxy (MBE) exhibit different growth morphologies and defect structures. The best morphology is achieved on (100) surfaces at low temperatures (∼400 °C), while thin and defect‐free SiGe layers grown at higher temperatures (∼600 °C) tend to exhibit undulated surfaces due to the mismatch strain. Strained SiGe layers grown on (111) and (110) surfaces are much more susceptible to twin formation. SiGe layers grown on (100) surfaces at low temperatures exhibit a long‐range order along the 〈111〉 directions. Our results indicate that such ordering occurs only in thick and relaxed SiGe layers but not in thin SiGe layers strained in a SiGe/Si superlattice structure. No ordering was observed in SiGe layers grown on (111) and (110) surfaces.