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Sudarshan Kumar

Intel

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Publication

Featured researches published by Sudarshan Kumar.

Archive | 2002

Gate-clocked domino circuits with reduced leakage current

Shahram Jamshidi; Sudarshan Kumar

Archive | 1995

Positive feedback circuit for fast domino logic

Kai J. Chin; Sudarshan Kumar

Archive | 1993

Fast static CMOS adder

Sudarshan Kumar; Jashojiban Banik

Archive | 2001

Method and apparatus for reducing soft errors in dynamic circuits

Sudarshan Kumar; Wenjie Jiang

Archive | 1990

MOS adder with minimum pass gates in carry line

Sudarshan Kumar

Archive | 1996

Carry skip adder with enhanced grouping scheme

Sudarshan Kumar

Archive | 2002

Low power entry latch to interface static logic with dynamic logic

Sudarshan Kumar; Shahram Jamshidi

Archive | 2001

LOW POWER PRECHARGE SCHEME FOR MEMORY BIT LINES

Sudarshan Kumar; Jiann-Cherng Lan; Wenjie Jiang; Gaurav G. Mehta; Sadhana Madhyastha

Archive | 2001

Method and apparatus for low power memory bit line precharge

Sudarshan Kumar; Gaurav G. Mehta; Sadhana Madhyastha; Jiann-Cherng Lan

Archive | 1996

Method and apparatus for providing a high speed tristate buffer

Bharat K. Bisen; Sudarshan Kumar

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Narsing K. Vijayrao

Intel

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Gaurav G. Mehta

Intel

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Jiann-Cherng James Lan

Intel

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Jiann-Cherng Lan

Intel

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Sadhana Madhyastha

Intel

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Wenjie Jiang

Intel

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Rajesh Manglore

Intel

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Shahram Jamshidi

Intel

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Vivek Joshi

Intel

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Bharat K. Bisen

Intel

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