Sukalpa Biswas
Apple Inc.
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Sukalpa Biswas.
international solid-state circuits conference | 2007
Zongjian Chen; Priya Ananthanarayanan; Sukalpa Biswas; Brian J. Campbell; Hao Chen; Shaishav Desai; Dominic Go; Rajat Goel; V. von Kaenel; J. Kassoff; Fabian Klass; Weichun Ku; T. Li; J. Lin; Khurram Z. Malik; Anup S. Mehta; Daniel C. Murray; E. Shiu; C. Shuler; Sribalan Santhanam; Gregory S. Scott; Junji Sugisawa; Toshinari Takayanagi; H. John Tarn; Pradeep R. Trivedi; James Wang; Ricky Wen; John Yong
An SoC is presented with dual 2GHz Powertrade cores, coherent crossbar interconnect, 2MB L2 cache, and memory and I/O subsystem. The chip consumes a maximum of 25W of power. The 115mm2 die is implemented in a 65nm 8M process with low-power design techniques. Circuits to improve system performance under power constraints are discussed
Archive | 2012
Sukalpa Biswas; Shinye Shiu
Archive | 2011
Luka Bodrozic; Sukalpa Biswas; Hao Chen; Sridhar P. Subramanian; James B. Keller
Archive | 2012
Sukalpa Biswas; Hao Chen; Ruchi Wadhawan
Archive | 2010
Sukalpa Biswas; Hao Chen
Archive | 2013
Hao Chen; Rakesh L. Notani; Sukalpa Biswas
Archive | 2012
Sukalpa Biswas; Shinye Shiu
Archive | 2012
Sukalpa Biswas; Shinye Shiu; James Wang
Archive | 2012
Sukalpa Biswas; Shinye Shiu; Rong Zhang Hu
Archive | 2011
Sukalpa Biswas; Hao Chen
