Sukhamoy Som
Old Dominion University
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Featured researches published by Sukhamoy Som.
real-time systems symposium | 1990
Sukhamoy Som; Roland R. Mielke; John W. Stoughton
Consideration is given to the development of strategies for predictable performance in homogeneous multicomputer data-flow architectures operating in real-time. Algorithms are restricted to the class of large-grained, decision-free algorithms. The mapping of such algorithms onto the specified class of data-flow architectures is realized by a new marked graph model called ATAMM (algorithm to architecture mapping model). Algorithm performance and resource needs are determined for predictable periodic execution of algorithms, which is achieved by algorithm modification and input data injection control. Performance is gracefully degraded to adapt to decreasing numbers of resources. The realization of the ATAMM model on a VHSIC four processor testbed is described. A software design tool for prediction of performance and resource requirements is described and is used to evaluate the performance of a space surveillance algorithm.<<ETX>>
international conference on distributed computing systems | 1988
Roland R. Mielke; John W. Stoughton; Sukhamoy Som
A novel graph-theoretic model for describing the relation between a decomposed algorithm and its execution in a multiprocessor environment is developed. Called ATAMM, the model consists of a set of Petri-net marked graphs that incorporates the general specifications of a data-flow architecture. The model is useful for representing decision-free algorithms having large-grained, computationally complex primitive operations. Performance measures of computing speed and throughput capacity are defined. The ATAMM model is used to develop analytically lower bounds for these parameters.<<ETX>>
international phoenix conference on computers and communications | 1990
Sukhamoy Som; John W. Stoughton; Roland R. Mielke
The algorithm-to-architecture mapping model (ATAMM) is a new marked graph (a class of Petri net) model from which the rules for data and control flow in a homogeneous, multicomputer, data-flow architecture may be defined. This study is concerned with performance modeling for periodic execution of large-grain, decision-free algorithms in such an ATAMM-defined architecture. Major applications are expected to be real-time implementation of control and signal processing algorithms where performance is required to be highly predictable. The computing environment, problem domain, and algorithm execution pattern are described. Performance measures of computing speed and throughout capacity are defined. Performance bounds are established. Resource (computing element) needs are determined for periodic execution of algorithms.<<ETX>>
asilomar conference on signals, systems and computers | 1991
Sukhamoy Som; R.R. Miekle; J.W. Stoughton
The authors discuss resource saturation in dataflow architectures operating in real time. Resource saturation is created by excessive concurrency in the computational problem and can make real-time system performance unpredictable. A computational model for dataflow architectures, called ATAMM, is described and used for achieving the best possible time performance for a given number of resources while retaining predictability and periodic steady state operation. Concurrency control measures are developed. Simulation results are presented to validate the ATAMM model and to illustrate that an uncontrolled execution of a dataflow graph can easily lead to unpredictable and degraded performance.<<ETX>>
southeastcon | 1990
Sukhamoy Som; B. Mandala; Roland R. Mielke; John W. Stoughton
A design tool for performance prediction in homogeneous, multicomputer dataflow architectures operating in real time is discussed. Algorithms are restricted to the class of large-grain, decision-free algorithms. Major applications are expected to be real-time implementation of control and signal processing algorithms, where performance is required to be highly predictable. The mapping of such algorithms onto the specified class of dataflow architectures is realized by a marked graph model called the algorithm to architecture mapping model (ATAMM). Performance measures which determine computing speed and throughput capacity are defined, and the lower bounds for these performance measures are stated. Computing resource needs are determined for predictable periodic execution of algorithms. A software design tool is presented to aid the designer in predicting performance and resource requirements.<<ETX>>
international phoenix conference on computers and communications | 1991
Sukhamoy Som; John W. Stoughton; Roland R. Mielke
The authors are concerned with performance modeling and enhancement for periodic execution of large-grain, decision-free algorithms in data flow architectures operating in real-time. The mapping of real-time algorithms onto data flow architectures is realized by a marked graph model called ATAMM (algorithm to architecture mapping model). Applications include control, surveillance, and signal processing problems. Performance is characterized by computing speed and throughput. Bounds on performance measures are established. A technique for transforming an algorithm to improve throughput while maintaining input-output equivalence is presented. The state equations of a linear time invariant system are modified to illustrate the throughput enhancement technique.<<ETX>>
asilomar conference on signals, systems and computers | 1990
Sukhamoy Som; B. Mandala; Roland R. Mielke; J.W. Stoughton
The Algorithm 10 Architecture Mapping Model (ATAMM) is a new marked graph (a class of Petri net) model for realization and analysis of real-time computing in multicomputer data flow architectures. This paper is concerned with throughput enhancement for periodic execution of large-grain, decision-free algorithms in an homogeneous ATAMM defined data flow architecture. Major applications are expected to be real-time implementation of control, surveillance, and signal processing algorithms where performance is required to be highly predictable. The computing environment is described and performance measures of computing speed and throughput capacity are defined. Bounds on performance measures are established. A technique for improving throughput by insertion of buffers is developed. A software tool to automate the technique in polynomial time is presented.
Archive | 1988
Roland R. Mielke; John W. Stoughton; Sukhamoy Som
Archive | 1991
John W. Stoughton; Roland R. Mielke; Sukhamoy Som; Rodrigo Obando; Mahyar R. Malekpour; Robert L. Jones; Brij Mohan V. Mandala
Proceedings of the IEEE | 1991
B. Mandala; Sukhamoy Som; Roland R. Mielke; John W. Stoughton