Sundar Narayanan

A novel low cost 65nm CMOS process architecture with self aligned isolation and W cladded source/drain

A novel CMOS process architecture comprising of 1.5 nm equivalent oxide thickness (EOT) oxide/nitride (O/N) gate dielectric, self aligned shallow trench isolation (SASTI), dual poly/W gate and W cladded source/drain is shown to have low gate dielectric leakage with excellent boron blocking, no dopant cross-diffusion and lower gate and source/drain parasitic resistance.

Monitoring Nitrogen Profiles in Ultrathin Gate Dielectrics

This paper proposes an inexpensive, manufacturing friendly method of determining the nitrogen profile in ultrathin gate dielectrics to understand its dependence on process parameters. The method uses a variable etch across the wafer with a very dilute HF dip followed by rapid thermal oxidation, and utilizes the oxidation retarding capability of the incorporated nitrogen to draw important conclusions on the nitrogen profile across the thickness of the dielectric. This test can be used in statistical process control for monitoring the nitrogen profile in the dielectric.

Comparative studies on GTA and PCGTA weldments of AISI 4140 and AISI 316 dissimilar metals

In this study, an attempt has been made to investigate the weldability, mechanical properties of dissimilar weldments of AISI 4140 and AISI 316. These dissimilar metals were welded using gas tungsten arc welding (GTAW) and Pulsed Current GTAW (PCGTAW) employing ER309L filler wire. It was observed from the tensile test results that the fracture was occurred at the parent metal of AISI 316 in all the trials for both the weldments. On examining the SEM fractographs, the mode of fracture was found to be ductile in nature. In addition, the scanning electron microscopy and electron dispersive X–ray spectroscopy (SEM/EDS) analysis was performed at various zones of the as–welded samples of AISI 4140 and AISI 316 to reveal the structure–property relationships.