Sung Haeng Cho

Solution-processed indium-free ZnO/SnO2 bilayer heterostructures as a low-temperature route to high-performance metal oxide thin-film transistors with excellent stabilities

The realization of high performance solution-processable metal oxide thin-film transistors (TFTs) with low annealing temperatures remains a challenge in the field of flexible and/or transparent electronics. Indium-based metal oxides are one of the most widely used materials as channel layers of metal oxide TFTs. However, the need for developing indium-free metal oxide materials has become urgent because of the high cost and limited supply of indium. Herein, we report high-performance solution-processed indium-free metal oxide TFTs prepared with low annealing temperatures by introducing ZnO/SnO2 bilayer heterostructures. After photo- and thermal annealing, ZnO/SnO2 bilayers form a unique nanostructure composed of three zones: Zn-only, Zn–Sn-mixed, and Sn-rich zones. The resulting ZnO/SnO2 TFTs exhibit outstanding mobility values as high as 15.4 cm2 V−1 s−1 with a low annealing temperature of 300 °C. These values are the highest yet measured among indium-free and solution-processed metal oxide TFTs prepared under similar annealing conditions. The ZnO/SnO2 TFTs also show remarkable outstanding operational stabilities under various external bias stresses. Their high performances and excellent stabilities can be attributed to the combinational effects of the highly conductive ultrathin Sn-rich channel and balanced carrier concentrations in the Zn–Sn-mixed region. We believe that our work provides a facile route to prepare inexpensive solution-processed electronic devices with earth-abundant materials such as backplane circuits for large-area and flexible displays.

Highly Stable, High Mobility Al:SnZnInO Back-Channel Etch Thin-Film Transistor Fabricated Using PAN-Based Wet Etchant for Source and Drain Patterning

We report the electrical characteristics of backchannel etch (BCE) metal-oxide-semiconductor thin-film transistor (TFT) comprised of aluminum-doped tin-zinc-indium oxide (ATZIO). It has high etch selectivity in wet chemical etchants, which consist of H3PO4, CH3COOH, and HNO3. This is contrary to the conventional metal-oxide-semiconductors of indium-gallium-zinc oxides, which are highly soluble in the acidic chemicals. As a result, no etch stop layer is needed to protect the backchannel from the wet etchant damage during the source and drain patterning in the bottom-gate-staggered TFT structure. This provides the possibility of oxide TFT fabrication process made as simple as that of the current amorphous silicon TFT using three or four photomasks with short channel length and less parasitic capacitance. The electrical characteristics of our ATZIO BCE-TFTs have the mobility of 21.4 cm2/V · s, subthreshold swing (S.S) of 0.11 V/decade, and threshold voltage of 0.8 V. In spite of the BCE structure, they have excellent stability against bias temperature stress, which shows the threshold voltage shifts of +0.75 V and -0.51 V under the prolonged positive (+20 V) and negative (-20 V) gate bias stresses for 10 000 s at 60 °C, respectively.

Characterization of amorphous multilayered ZnO-SnO2 heterostructure thin films and their field effect electronic properties

Multilayered ZnO-SnO2 heterostructure thin films were produced using pulsed laser ablation of pie-shaped ZnO-SnO2 oxides target, and their structural and field effect electronic transport properties were investigated as a function of the thickness of the ZnO and SnO2 layers. The films have an amorphous multilayered heterostructure composed of the periodic stacking of the ZnO and SnO2 layers. The field effect electronic properties of amorphous multilayered ZnO-SnO2 heterostructure thin film transistors (TFTs) are highly dependent on the thickness of the ZnO and SnO2 layers. The highest electron mobility of 37 cm2/V s, a low subthreshold swing of a 0.19 V/decade, a threshold voltage of 0.13 V, and a high drain current on-to-off ratio of ∼1010 obtained for the amorphous multilayered ZnO(1.5 nm)-SnO2(1.5 nm) heterostructure TFTs. These results are presumed to be due to the unique electronic structure of an amorphous multilayered ZnO-SnO2 heterostructure film consisting of ZnO, SnO2, and ZnO-SnO2 interface layers.

Light-adaptable display for the future advertising service

ABSTRACT In this paper, a new light-adaptable display (LAD) structure with minimum power consumption is proposed for the future advertising service, and the demonstrated results are reported. An organic light-emitting diode with color reflection (colored OLED) was applied for the reflective- and emissive-mode device, and a guest-host liquid-crystal device (GH-LC) was adopted for the light shutter device. The current efficiency and reflectance of the colored OLED were 35.15 cd/A at 457 cd/m2 luminance and 63% for the yellow color, respectively. The measured contrast ratio of GH-LC was 15.5:1 at dark-room conditions, respectively. Transparent oxide thin-film transistors were used for the backplane, and their average mobility was 9.08 cm2/V s, with a 0.5 standard deviation. Through the optimization of the fabrication process and the structures of each device, the LAD adaptively operating according to the environmental illuminance from dark to 10,000 nits was successfully demonstrated. Moreover, a new LAD driving method was proposed for minimizing the power consumption.

Beneficial effect of hydrogen in aluminum oxide deposited through the atomic layer deposition method on the electrical properties of an indium–gallium–zinc oxide thin-film transistor

ABSTRACT Described herein is the role of hydrogen in aluminum oxide (Al2O3) gate dielectrics in amorphous indium–gallium–zinc oxide (a-InGaZnO or a-IGZO) thin-film transistors (TFTs). Compared to a-IGZO TFTs with a low-temperature (150°C) Al2O3 gate dielectric, a-IGZO devices with a high-temperature (250–300°C) Al2O3 gate dielectric exhibit poor transistor characteristics, such as low mobility, a high subthreshold slope, and huge hysteresis. Through DC and short-pulsed current–voltage (I–V) measurements, it was revealed that the degradation of the transistor performance stems from the charging and discharging phenomenon at the interface traps located in the interface between the a-IGZO semiconductor and the Al2O3 gate insulator. It was found that the low-temperature Al2O3 atomic layer deposition processed film contains a higher density of hydrogen atoms compared to high-deposition-temperature films. The study results show that a high concentration of hydrogen atoms can passivate the defect sites in the interface and bulk, which produces excellent transistor characteristics. This study demonstrated that hydrogen has a beneficial effect on the defect passivation for oxide TFTs.

Defects and Charge-Trapping Mechanisms of Double-Active-Layer In–Zn–O and Al–Sn–Zn–In–O Thin-Film Transistors

Active matrix organic light-emitting diodes (AMOLEDs) are considered to be a core component of next-generation display technology, which can be used for wearable and flexible devices. Reliable thin-film transistors (TFTs) with high mobility are required to drive AMOLEDs. Recently, amorphous oxide TFTs, due to their high mobility, have been considered as excellent substitutes for driving AMOLEDs. However, the device instabilities of high-mobility oxide TFTs have remained a key issue to be used in production. In this paper, we present the charge-trapping and device instability mechanisms of high-mobility oxide TFTs with double active layers, using In-Zn-O (IZO) and Al-doped Sn-Zn-In-O (ATZIO) with various interfacial IZO thicknesses (0-6 nm). To this end, we employed microsecond fast current-voltage (I-V), single-pulsed I-V, transient current, and discharge current analysis. These alternating-current device characterization methodologies enable the extraction of various trap parameters and defect densities as well as the understanding of dynamic charge transport in double-active-layer TFTs. The results show that the number of defect sites decreases with an increase in the interfacial IZO thickness. From these results, we conclude that the interfacial IZO layer plays a crucial role in minimizing charge trapping in ATZIO TFTs.

Effect of hydrogen diffusion in an In–Ga–Zn–O thin film transistor with an aluminum oxide gate insulator on its electrical properties

We fabricated amorphous InGaZnO thin film transistors (a-IGZO TFTs) with aluminum oxide (Al2O3) as a gate insulator grown through atomic layer deposition (ALD) method at different deposition temperatures (Tdep). The Al2O3 gate insulator with a low Tdep exhibited a high amount of hydrogen in the film, and the relationship between the hydrogen content and the electrical properties of the TFTs was investigated. The device with the Al2O3 gate insulator having a high H content showed much better transfer parameters and reliabilities than the low H sample. This is attributed to the defect passivation effect of H in the active layer, which is diffused from the Al2O3 layer. In addition, according to the post-annealing temperature (Tpost-ann), a-IGZO TFTs exhibited two unique changes of properties; the degradation in low Tpost-ann and the enhancement in high Tpost-ann, as explained in terms of H diffusion from the gate insulator to an active layer.

InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity

In this letter, high-performance InZnO/AlSnZnInO (IZO/ATZIO) bilayer thin-film transistors (TFTs) with an inverted staggered back channel etch structure are presented. The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High field-effect mobility (μFE) over 60 cm2/Vs was obtained from the structure with 8-nm IZO channel insertion between the gate dielectric and the ATZIO layer. The device shows good controllability in light of TFT operation. The subthreshold slope, turn-ON voltage (VON), and ON/OFF ratio were 0.16 V/decade, -1.52 V, and 5×109, respectively.

Back channel etch oxide TFT on plastic substrate for the application of high resolution TFT-LCD

We present high performance back channel etch (BCE) oxide TFT of which overlap capacitance between source/drain and gate is minimized. With considering application to the plastic LCD, we fabricated BCE TFT under 250^oC with PECVD SiN_x/PEALD SiO₂ gate insulator and its mobility, S.S, V_th are 28.7 cm²/V.s, 0.1 V/dec, and 1.06 V, respectively. Its V_th shift under positive bias stress for 10,000 seconds is 0.75 V at 20V. BCE TFT fabricated on transparent GFRHybrimer film which has no retardation showed mobility of 19.1 cm²/V.s.

Light illumination effect in AIZTO/IZO dual-channel TFTs

In oxide thin-film transistors (TFTs), light illumination effect is a big concern due to its operating condition. Light illumination can change many electrical properties in oxide TFTs such as mobility and threshold voltage (Vth). In many researches, Oxygen vacancy is suspected as a main cause of the changes by light illumination. Recently, the back channel formation by field-induced macroscopic barrier model is reported under light illumination. This is also related to Oxygen vacancy. In this letter, we investigate the gradual changes in DC and CV characteristics depending on the dual-channel thicknesses. For this purpose, we use the aluminum-doped indium zinc tin oxide (AIZTO)/indium zinc oxide (IZO) dual-channel TFTs. The main goal of this paper is to find the main cause of the changes by light illumination in various dual-channel thicknesses.