Suresh Kumar Garlapati

A General Route toward Complete Room Temperature Processing of Printed and High Performance Oxide Electronics

Critical prerequisites for solution-processed/printed field-effect transistors (FETs) and logics are excellent electrical performance including high charge carrier mobility, reliability, high environmental stability and low/preferably room temperature processing. Oxide semiconductors can often fulfill all the above criteria, sometimes even with better promise than their organic counterparts, except for their high process temperature requirement. The need for high annealing/curing temperatures renders oxide FETs rather incompatible to inexpensive, flexible substrates, which are commonly used for high-throughput and roll-to-roll additive manufacturing techniques, such as printing. To overcome this serious limitation, here we demonstrate an alternative approach that enables completely room-temperature processing of printed oxide FETs with device mobility as large as 12.5 cm(2)/(V s). The key aspect of the present concept is a chemically controlled curing process of the printed nanoparticle ink that provides surprisingly dense thin films and excellent interparticle electrical contacts. In order to demonstrate the versatility of this approach, both n-type (In2O3) and p-type (Cu2O) oxide semiconductor nanoparticle dispersions are prepared to fabricate, inkjet printed and completely room temperature processed, all-oxide complementary metal oxide semiconductor (CMOS) invertors that can display significant signal gain (∼18) at a supply voltage of only 1.5 V.

Ink-Jet Printed CMOS Electronics from Oxide Semiconductors

Complementary metal oxide semiconductor (CMOS) technology with high transconductance and signal gain is mandatory for practicable digital/analog logic electronics. However, high performance all-oxide CMOS logics are scarcely reported in the literature; specifically, not at all for solution-processed/printed transistors. As a major step toward solution-processed all-oxide electronics, here it is shown that using a highly efficient electrolyte-gating approach one can obtain printed and low-voltage operated oxide CMOS logics with high signal gain (≈21 at a supply voltage of only 1.5 V) and low static power dissipation.

Electrolyte-Gated, High Mobility Inorganic Oxide Transistors from Printed Metal Halides

Inkjet printed and low voltage (≤1 V) driven field-effect transistors (FETs) are prepared from precursor-made In2O3 as the transistor channel and a composite solid polymer electrolyte (CSPE) as the gate dielectric. Printed halide precursors are annealed at different temperatures (300-500 °C); however, the devices that are heated to 400 °C demonstrate the best electrical performance including field-effect mobility as high as 126 cm(2) V(-1) s(-1) and subthreshold slope (68 mV/dec) close to the theoretical limit. These outstanding device characteristics in combination with ease of fabrication, moderate annealing temperatures and low voltage operation comprise an attractive set of parameters for battery compatible and portable electronics.

A new class of epitaxial porphyrin metal–organic framework thin films with extremely high photocarrier generation efficiency: promising materials for all-solid-state solar cells

We demonstrate the fabrication of a new class of epitaxial porphyrin metal–organic framework thin films whose photophysical properties can be tuned by the introduction of electron-donating diphenylamine (DPA) groups into the porphyrin skeleton. The attachment of DPA groups results in strongly improved absorption characteristics, yielding the highest photocarrier generation efficiency reported so far. DFT calculations identify a shift of the charge localization pattern in the VBM (lowest unoccupied molecular orbital), confirming that the introduction of the DPA groups is the main reason for the shift of the optical absorption spectrum and the improved photocurrent generation.

Digital power and performance analysis of inkjet printed ring oscillators based on electrolyte-gated oxide electronics

Printed electronic components offer certain technological advantages over their silicon based counterparts, like mechanical flexibility, low process temperatures, maskless and additive manufacturing possibilities. However, to be compatible to the fields of smart sensors, Internet of Things, and wearables, it is essential that devices operate at small supply voltages. In printed electronics, mostly silicon dioxide or organic dielectrics with low dielectric constants have been used as gate isolators, which in turn have resulted in high power transistors operable only at tens of volts. Here, we present inkjet printed circuits which are able to operate at supply voltages as low as <= 2 V. Our transistor technology is based on lithographically patterned drive electrodes, the dimensions of which are carefully kept well within the printing resolutions; the oxide semiconductor, the electrolytic insulator and the top-gate electrodes have been inkjet printed. Our inverters show a gain of similar to 4 and 2.3 ms propagation delay time at 1 V supply voltage. Subsequently built 3-stage ring oscillators start to oscillate at a supply voltage of only 0.6 V with a frequency of similar to 255 Hz and can reach frequencies up to similar to 350 Hz at 2 V supply voltage. Furthermore, we have introduced a systematic methodology for characterizing ring oscillators in the printed electronics domain, which has been largely missing. Benefiting from this procedure, we are now able to predict the switching capacitance and driver capability at each stage, as well as the power consumption of our inkjet printed ring oscillators. These achievements will be essential for analyzing the performance and power characteristics of future inkjet printed digital circuits.

Electrolyte-Gated FETs Based on Oxide Semiconductors: Fabrication and Modeling

High mobility, electrolyte-gated FETs (EGFETs), based on precursor-derived oxide semiconductors, enable the possibility of achieving printed and low voltage (<;2 V) operated circuits. These EGFETs can also be realized with displaced-gate geometries. However, the displaced-gate devices are typically slow due to high electrolyte resistance resulting from the large gate-channel distances. Here, we show that a thin insulating (composite solid polymer electrolyte) layer and a top-gate geometry can largely overcome this limitation, a comprehensive comparison between the displaced-gate and the top-gate devices has been provided. In order to facilitate circuit design, we have successfully developed accurate models to predict the behavior of these top-gate EGFETs. The importance of our modeling approach is further enhanced by the fact that appropriate predictive modeling strategies for printed circuits, especially for those that are based on oxide semiconductors, are largely missing. Unlike existing transistor models that do not cover all voltage regimes (below, near, and above threshold), we propose a new modeling methodology that matches very well with the measured data, is continuous and smooth over the entire voltage range, and can be easily incorporated into SPICE simulators.

High performance printed oxide field-effect transistors processed using photonic curing

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Printed Electronics Based on Inorganic Semiconductors: From Processes and Materials to Devices

Following the ever-expanding technological demands, printed electronics has shown palpable potential to create new and commercially viable technologies that will benefit from its unique characteristics, such as, large-area and wide range of substrate compatibility, conformability and low-cost. Through the last few decades, printed/solution-processed field-effect transistors (FETs) and circuits have witnessed immense research efforts, technological growth and increased commercial interests. Although printing of functional inks comprising organic semiconductors has already been initiated in early 1990s, gradually the attention, at least partially, has been shifted to various forms of inorganic semiconductors, starting from metal chalcogenides, oxides, carbon nanotubes and very recently to graphene and other 2D semiconductors. In this review, the entire domain of printable inorganic semiconductors is considered. In fact, thanks to the continuous development of materials/functional inks and novel design/printing strategies, the inorganic printed semiconductor-based circuits today have reached an operation frequency up to several hundreds of kilohertz with only a few nanosecond time delays at the individual FET/inverter levels; in this regard, often circuits based on hybrid material systems have been found to be advantageous. At the end, a comparison of relative successes of various printable inorganic semiconductor materials, the remaining challenges and the available future opportunities are summarized.

High-Performance All-Printed Amorphous Oxide FETs and Logics with Electronically Compatible Electrode/Channel Interface

Oxide semiconductors typically show superior device performance compared to amorphous silicon or organic counterparts, especially when they are physical vapor deposited. However, it is not easy to reproduce identical device characteristics when the oxide field-effect transistors (FETs) are solution-processed/printed; the level of complexity further intensifies with the need to print the passive elements as well. Here, we developed a protocol for designing the most electronically compatible electrode/channel interface based on the judicious material selection. Exploiting this newly developed fabrication schemes, we are now able to demonstrate high-performance all-printed FETs and logic circuits using amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor, indium tin oxide (ITO) as electrodes, and composite solid polymer electrolyte as the gate insulator. Interestingly, all-printed FETs demonstrate an optimal electrical performance in terms of threshold voltages and device mobility and may very well be compared with devices fabricated using sputtered ITO electrodes. This observation originates from the selection of electrode/channel materials from the same transparent semiconductor oxide family, resulting in the formation of In-Sn-Zn-O (ITZO)-based-diffused a-IGZO-ITO interface that controls doping density while ensuring high electrical performance. Compressive spectroscopic studies reveal that Sn doping-mediated excellent band alignment of IGZO with ITO electrodes is responsible for the excellent device performance observed. All-printed n-MOS-based logic circuits have also been demonstrated toward new-generation portable electronics.