Susheel Sharma
University of Jammu
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Publication
Featured researches published by Susheel Sharma.
asia pacific conference on circuits and systems | 2002
Susheel Sharma; S. S. Rajput; L.K. Magotra; S. S. Jamuar
Low voltage current mirror (LVCM) based on floating gate MOSFET (FGMOS) has been presented in this paper. The LVCM has output current range of 100 nA to 500 /spl mu/A, high output resistance (1.35 M/spl Omega/ at 500 /spl mu/A), high bandwidth (500 MHz) and low input compliance voltage (0.4 V at 20 /spl mu/A input current and 0.6 V at 300 /spl mu/A input current). The LVCM design has been verified using P-Spice for 0.5 /spl mu/m technology and the error in current transfer is observed to be less than /spl plusmn/0.1%. Simulations have also been carried out for p-type LVCM and bipolar LVCM.
Microelectronics Journal | 2012
Rockey Gupta; Susheel Sharma
This paper demonstrates the use of quasi-floating gate MOSFET (QFGMOS) in the design of a low voltage current mirror and highlights its advantages over the floating gate MOSFET (FGMOS). The use of resistive compensation has been shown to enhance the bandwidth of QFGMOS current mirror. The proposed current mirror based on QFGMOS has a current range up to 500@mA with offset of 2.2nA, input resistance of 235@W, output resistance of 117k@W, current transfer ratio of 0.98, dissipates 0.83mW power and exhibits bandwidth of 656MHz which increases to 1.52GHz with resistive compensation. The theoretical and simulation results are in good agreement. The workability of the circuits has been verified using PSpice simulation for 0.13@mm technology with a supply voltage of +/-0.5V.
asia pacific conference on circuits and systems | 2010
Rockey Gupta; Susheel Sharma; S. S. Jamuar
A low voltage current mirror based on quasi-floating gate MOSFET (QFGMOS) is presented. The use of QFGMOS eliminates the limitations associated with floating-gate MOSFET (FGMOS) structures like increased silicon area, initial charge trapped in the floating gates and gain-bandwidth product degradation. The proposed current mirror based on QFGMOS has a current range up to 500 µA with offset of 10 pA, exhibits high bandwidth of 640 MHz, input resistance of 480 Ω, output resistance of 1.67 GΩ, unity current transfer ratio and dissipates 1.5 mW power. A resistive compensation has also been employed to increase the bandwidth up to 1.3 GHz.
Iete Technical Review | 2008
Susheel Sharma; S. S. Rajput; Sudhanshu Shekhar Jamuar
Abstract Floating-gate MOS transistor (FGMOS) has proved to be suitable for low-voltage analog applications, owing to its threshold voltage programmability. This tutorial paper presents FGMOS based circuit structures and their applications in analog signal processing. The FGMOS based current mirror and its application as voltage controlled current source has been presented. The performance of these structures has been verified using PSpice simulations for 0.5 im CMOS technology at 0.75 V.
ieee region 10 conference | 2005
Susheel Sharma; S. S. Rajput; K. Pal; L. K. Mangotra; Nor Kamariah Nordin; Sudhanshu Shekhar Jamuar
This paper aims at the development of floating gate MOSFET (FGMOS) based low voltage (plusmn 0.75 V), voltage-mode and current-mode circuits. Using low voltage CCII, impedance converter has been realized, which is used to simulate high value of inductance for at least 100 kHz. This circuit has also been used as capacitance multiplier. Some new bandpass filter circuits have also been presented. The circuits employ FGMOS based active elements besides grounded capacitors and are suitable for chip implementation. Theoretical results have been validated by PSpice simulations carried out using 0.5 mum CMOS technology parameters.
Proceedings of the International Conference on Advances in Computer Science and Electronics Engineering | 2012
Susheel Sharma; Rockey Gupta
In this paper a voltage controlled current conveyor is presented wherein the intrinsic transresistance is controlled by a voltage variable current source which is realized using floatinggate MOSFETs. The resultant conveyor has been used to implement an impedance converter which is further used as inductance simulator. The characteristics of the conveyor and inductance simulation have been obtained through PSpice simulations carried out using level 3 parameters of 0.5 μm CMOS technology with supply voltage of ± 0.75 V. The simulation results are found to be in conformity with the mathematical analysis. Keywordscurrent controlled current conveyor; current source; inductance simulation
Analog Integrated Circuits and Signal Processing | 2006
Susheel Sharma; S. S. Rajput; L. K. Mangotra; Sudhanshu Shekhar Jamuar
Indian Journal of Pure & Applied Physics | 2008
Parshotam S. Manhas; Susheel Sharma; K. Pal; L. K. Mangotra; K. K. S. Jamwal
Archive | 2008
S. S. Jamuar; Susheel Sharma; S. S. Rajput
Indian Journal of Pure & Applied Physics | 2009
Parshotam S. Manhas; K. Pal; Susheel Sharma; L. K. Mangotra; K. K. S. Jamwal
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Post Graduate Institute of Medical Education and Research
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