Sven Mattisson

On the use of MOS varactors in RF VCOs

This paper presents two 1.8 GHz CMOS voltage-controlled oscillators (VCOs), tuned by an inversion-mode MOS varactor and an accumulation-mode MOS varactor, respectively. Both VCOs show a lower power consumption and a lower phase noise than a reference VCO tuned by a more commonly used diode varactor. The best overall performance is displayed by the accumulation-mode MOS varactor VCO. The VCOs were implemented in a standard 0.6 /spl mu/m CMOS process.

Bluetooth-a new low-power radio interface providing short-range connectivity

In the past decades, progress in microelectronics and VLSI technology has fostered the widespread use of computing and communication applications in portable electronic devices. In this paper, we review the Bluetooth technology, a new universal radio interface enabling electronic devices to connect and communicate wirelessly via short-range connections. Motivations for the air interface design and radio requirement decisions are discussed. Frequency hopping, interference resistance, and the concepts of ad hoc connectivity and scatternets are explained in detail. Furthermore, Bluetooth characteristics enabling low-cost single-chip implementations and supporting low power consumption are discussed.

On the use of Nauta's transconductor in low-frequency CMOS g/sub m/-C bandpass filters

This paper discusses the use of a transconductor, first proposed by Nauta for high frequency applications, in low frequency CMOS g/sub m/-C bandpass filters. The behavior of the transconductor is examined in detail, showing that the robust implementation of higher-order low-voltage filters is possible for center frequencies in the lower megahertz region. The experimental results are presented of the realization of two prototypes, a 0.6-/spl mu/m CMOS 18th-order real bandpass filter and a 0.35-/spl mu/m CMOS 7th-order complex (14th-order bandpass) filter, both with a center frequency of 3 MHz and a passband of 1 MHz. These filters comply with the specifications for the channel-select stage of the Bluetooth short-range radio receiver.

A 9-band WCDMA/EDGE transceiver supporting HSPA evolution

The future of cellular radio ICs lies in the integration of an ever-increasing number of bands and channel bandwidths. Figure 21.2.1 shows the block diagram of our transceiver, together with the associated discrete front-end components. The transceiver supports 4 EDGE bands and 9 WCDMA bands (I-VI and VIII-X), while the radio can be configured to simultaneously support the 4 EDGE bands and up to 5 WCDMA bands: 3 high bands (HB) and 2 low bands (LB). The RX is a SAW-less homodyne composed of a main RX and a diversity RX. To reduce package complexity with so many bands, we chose to minimize the number of ports by using single-ended RF interfaces for both RX and TX. This saves several package pins, but requires careful attention to grounding. The main RX has 8 LNA ports and the diversity RX has 5, with some LNAs supporting multiple bands. On the TX side, 2 ports are used for all EDGE bands and 4 for the WCDMA bands.

Low-power considerations in the design of Bluetooth

In this paper, we review the Bluetooth technology, a new universal radio interface enabling electronic devices to connect and communicate wirelessly via short-range connections. Motivations for the radio requirements are given, and the implications of system parameters like operating modes, frequency hopping and interference resistance are discussed from a low-power perspective. Specific characteristics enabling low-cost single-chip implementations and supporting low power consumption are outlined.

A Filtering Delta Sigma ADC for LTE and Beyond

This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebyshev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/ √{Hz}, and an out-of-band (half-duplex) IIP3 of 20/12 dBV rms , with a power consumption of 7.9/5.4 mW and an overall state-of-the art performance.

Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time /spl Sigma//spl Delta/ ADC

This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-/spl mu/m BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (/spl Sigma//spl Delta/) ADC has 84-dB dynamic range over a total bandwidth of /spl plusmn/135 kHz for an active area of 0.4 mm/sup 2/. Hence, most of the channel filtering is realized in a CMOS IC where digital processing is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate coupling analysis enables to optimize the floor plan strategy. As a result, the receiver has an area of 1.8 mm/sup 2/.

A receiver for LTE Rel-11 and beyond supporting non-contiguous carrier aggregation

Carrier aggregation (CA) is introduced in 3GPP LTE Rel-10 [1] to meet the demand for further increased bitrates. While LTE Rel-10 supports simultaneous reception of two carriers either in contiguous intra-band or in inter-band CA configuration, the upcoming LTE Rel-11 will add support for non-contiguous (NC) carriers within bands. Supporting NC CA in handsets is a demanding challenge for several reasons. Foremost, the total bandwidth spanned by the carriers may be several times the bandwidth of the individual carriers, possibly spanning an entire band with interfering signals between desired carriers. Furthermore, the distance between TX and RX carriers will vary and worse, may be much smaller than the fixed duplex distance for LTE Rel-8 and W-CDMA single carrier operation [2-5].

A 2.4-GHz CMOS monolithic VCO based on an MOS varactor

A 2.4-GHz CMOS VCO is presented employing pMOS transistors as voltage-controlled capacitances and on-chip hollow spiral inductors. The design was implemented in a standard digital 0.8 /spl mu/m CMOS process and exhibits a 15% tuning range at 2.5 V supply voltage and 9 mA supply current. Phase-noise measurements show a phase-noise of about -118 dBc/Hz at 1 MHz from the carrier.

Wideband SAW-Less Receiver Front-End With Harmonic Rejection Mixer in 65-nm CMOS

A wideband direct-conversion receiver front-end featuring a new harmonic rejection technique is demonstrated in 65-nm CMOS. The circuit consists of a two-stage low-noise amplifier, the first stage with capacitive feedback, a harmonic rejection mixer using 25% and 50% duty cycle local oscillator signals, and a third-order channel-select filter with configurable bandwidth. The receiver front-end is intended for surface-acoustic-wave-less cellular applications, and its performance was measured at 900- and 1800-MHz bands. The average harmonic rejection over GSM and LTE channel bandwidths is between 60 and 70 dB. Peak harmonic rejection exceeds 80 dB. The noise figures (NFs) are 3.3 and 3.9 dB for the complete receiver front-end in low band and high band, respectively, with an S11 below -15 dB from 500 MHz to 2.5 GHz. The 1-dB received signal compression points with a blocker present at 20/80 MHz offset for low/high band are 0 and +2 dBm, respectively. The NF with 0-dBm blocker is 13 dB. For low band, the in-band IIP3 and IIP2 are -14.8 and > 49 dBm, respectively, and, for high band, -18.2 and > 44 dBm. The circuit worst case consumes 80 mW of power.