Swaminathan Sankaran

Progress and Challenges Towards Terahertz CMOS Integrated Circuits

Key components of systems operating at high millimeter wave and sub-millimeter wave/terahertz frequencies, a 140-GHz fundamental mode voltage controlled oscillator (VCO) in 90-nm CMOS, a 410-GHz push-push VCO with an on-chip patch antenna in 45-nm CMOS, and a 125-GHz Schottky diode frequency doubler, a 50-GHz phase-locked loop with a frequency doubled output at 100 GHz, a 180-GHz Schottky diode detector and a 700-GHz plasma wave detector in 130-nm CMOS are demonstrated. Based on these, and the performance trends of nMOS transistors and Schottky diodes fabricated in CMOS, paths to terahertz CMOS circuits and systems including key challenges that must be addressed are suggested. The terahertz CMOS is a new opportunity for the silicon integrated circuits community.

125-GHz Diode Frequency Doubler in 0.13-

The first mm-wave Schottky diode frequency doubler fabricated in CMOS is demonstrated. The doubler built in 130-nm CMOS uses a balanced topology with two shunt Schottky barrier diodes, and exhibits ~ 10-dB conversion loss as well as -1.5-dBm output power at 125 GHz. The input matching is better than -10 dB from 61 to 66 GHz. The rejection of fundamental signal at output is greater than 12 dB for input frequency from 61 to 66 GHz. The doubler can generate signals up to 140 GHz.

\mu{\hbox {m}}

The electromagnetic spectrum between 300GHz and 3THz is broadly referred as terahertz [1]. The utility of this portion of spectrum for detection of chemicals and bio agents, for imaging of concealed weapons, cancer cells and manufacturing defects [1, 2], and for studying chemical species using electron paramagnetic resonance, as well as, in short range radars and secured high data rate communications has been demonstrated. However, high cost and low level of integration for III–V devices needed for the systems have limited their wide use. The improvements in the high frequency capability of CMOS have made it possible to consider CMOS as a lower cost alternative for realizing the systems that can greatly expand the use of this spectrum range.

CMOS

The feasibility of integrating antennas and required circuits to form wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction of transmitted and received signals with nearby circuits appear to be manageable. This technology can potentially be used for intra and inter-chip interconnection, and implementation of true single chip radios, beacons, radars, RFID tags and others, as well as contact-less high frequency testing

Towards terahertz operation of CMOS

This paper presents a 160 GHz center frequency pulsed 65 nm CMOS transceiver for short range radar applications. Four phased array transceivers were implemented in a single chip with antennas implemented in a BGA package. The implemented transmitter is capable of producing pulses of 100 ps widths ( >20 GHz RF bandwidth) at a 160 GHz carrier frequency. The measured effective isotropic radiated power (EIRP) is 18.8 dBm for continuous wave outputs. The analog beam forming receiver achieves an overall gain of 42.5 dB, -14 dBm IP1dB, 7 GHz bandwidth, and a noise figure of 22.5 dB. The sliding window time-dilation baseband relaxes the output data rate and subsequent digital processing requirements. Fine grained duty cycling reduces power dissipation. The entire chip consumes 2.2 W from 1.2/1.4 V supplies in a 65 nm digital CMOS process.

Silicon Integrated Circuits Incorporating Antennas

A 182-GHz Schottky barrier diode detector has been demonstrated in 130-nm foundry CMOS using signals generated on-chip by modulating the bias current of a push-push voltage controlled oscillator as input. This work demonstrated that it is possible to build a detector operating near the top end of millimeter-wave range using digital CMOS

A 160 GHz Pulsed Radar Transceiver in 65 nm CMOS

The first mm-wave varistor mode Schottky diode frequency doubler fabricated in CMOS is demonstrated. The doubler exhibits 14 dB conversion loss, -11 dBm output power at 132 GHz and 6 GHz 3-dB output bandwidth from 128 to 134 GHz. The input matching is better than -10 dB and the rejection of fundamental signal at output is greater than 14 dB from 62 to 70 GHz.

A Millimeter-Wave Schottky Diode Detector in 130-nm CMOS Technology

The first complementary anti-parallel Schottky diode frequency tripler in CMOS is demonstrated. The tripler exhibits ~34-dB minimum conversion loss, -24-dBm maximum output power at 150 GHz, and 3 db output frequency range of ~10 GHz.

Millimeter Wave Varistor Mode Schottky Diode Frequency Doubler in CMOS

Utility of Schottky diodes fabricated in foundry digital 130-nm CMOS technology is demonstrated by implementing an ultra-wideband (UWB) amplitude modulation detector consisting of a low-noise amplifier (LNA), a Schottky diode rectifier, and a low-pass filter. The input and output matching of the detector is better than -10 dB from 0-10.3 GHz and 0-1.7 GHz, respectively, and almost covers the entire UWB frequency band (3.1-10.6 GHz). The measured peak conversion gain is -2.2dB. The sensitivity over the band for amplitude modulation with the minimum E b/No of 6 dB is between -53 and -56 dBm. The power consumption is only 8.5 mW

150 GHz Complementary Anti-Parallel Diode Frequency Tripler in 130 nm CMOS

A significant increase in Smartphones and tablets with embedded Wi-Fi demands a low-cost system solution. In this paper the RF core of an 802.11n 2×2 b/g band, 2×1 a-band MIMO WLAN SoC with die area of 3.83mm2 in 45nm CMOS is described. As shown in Fig. 19.1.1 the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band, eliminating the need for an expensive external Front-End Module. The LO is synthesized by a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.