Sze Sing Lee

Switched-Battery Boost-Multilevel Inverter with GA Optimized SHEPWM for Standalone Application

This paper presents a boost-multilevel inverter design with integrated battery energy storage system for standalone application. The inverter consists of modular switched-battery cells and a full-bridge. It is multifunctional and has two modes of operation: 1) the charging mode, which charges the battery bank and 2) the inverter mode, which supplies ac power to the load. This inverter topology requires significantly less power switches compared to conventional topology such as cascaded H-bridge multilevel inverter, leading to reduced size/cost and improved reliability. To selectively eliminate low-order harmonics and control the desired fundamental component, nonlinear system equations are represented in fitness function through the manipulation of modulation index and the genetic algorithm (GA) is employed to find the optimum switching angles. A seven-level inverter prototype is implemented and experimental results are provided to verify the feasibility of the proposed inverter design.

Improved Single-Phase Split-Source Inverter With Hybrid Quasi-Sinusoidal and Constant PWM

A single-stage topology of a three-phase boost inverter known as split-source inverter (SSI) has recently been introduced in the literature. This topology suffers from high frequency current commutations across two diodes and complicated analysis since the inductor is charged with variable duty cycle. This paper presents a single-phase version of SSI with improvements in inverter topology as well as the pulse width modulation (PWM) technique. An inductor is connected to two MOSFETs operating at fundamental frequency to boost the voltage from input source to dc-link voltage. In the proposed hybrid quasi-sinusoidal and constant PWM, one of the full-bridge legs undergoes constant duty cycle switching while the other one undergoes sinusoidally varying duty cycle switching, with the former is accountable for charging and discharging of inductor while the latter is accountable for producing ac output. Therefore, the proposed topology with hybrid quasi-sinusoidal and constant PWM exhibits the merit of simplicity since the control of dc-link voltage and ac output is detached within the single-stage topology. It is not liable to the undesired high frequency current commutation. In addition, a wide range of ac output voltage is achievable in either buck or boost operation. Theoretical analysis is presented and verified through simulation and experimental results.

Minimization of torque ripple in direct torque control of induction motor at low speed

This paper presents a new technique to minimize the torque ripples inherited in DTC of induction motor. The typical discrete-based DTC imposes delay time which frequently allows the torque to overshoot beyond hysteresis bands. This triggers the selection of reverse voltage vectors which, in turn, cause large torque decrements. The torque ripples become of great significance at low speeds where torque overshoot is most likely to occur due to steep positive torque slope. A multi-level DC link voltage is proposed to vary the DC voltage of Voltage Source Inverter (VSI) according to motors speed. By varying the DC link voltage, the torque slopes can be controlled and, hence, the torque overshoots can mostly be avoided. Therefore, the torque ripples are significantly minimized. The viability of proposed technique has been validated using MATLAB/Simulink software. Results show the proposed technique yielded over 50% reduction in the RMS torque ripples while maintaining a low switching frequency.

Hybrid Cascaded Multilevel Inverter (HCMLI) With Improved Symmetrical 4-Level Submodule

This letter proposes an improved symmetrical 4-level submodule as a basic cell for generating multiple dc voltage levels. A hybrid cascaded multilevel inverter (HCMLI) topology is formed by the combination of n submodules and a full-bridge. A comparative analysis against the recent multilevel inverters reveals that the proposed topology requires less number of switches and dc sources. In addition, the proposed submodule reduces the number of conducting switch and gate driver requirements compared to the widely used half-bridge submodule. To validate the operation of the proposed HCMLI topology, experimental results of a 9-level single-phase inverter controlled by selective harmonic elimination pulse-width-modulation is presented.

A Symmetrical Cascaded Compact-Module Multilevel Inverter (CCM-MLI) With Pulsewidth Modulation

Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented.

Multilevel inverter for standalone application with selective harmonic elimination

Renewable energy demand increases due to environmentally friendly. Power electronics development enhance the power quality produced. Standalone application multilevel inverter can help in improve rural area which is no electrified. For a multilevel inverter, the output required low total harmonics distortion and voltage boosting character. However, the conventional multilevel inverter are high distortion with high switching frequency. This paper is presenting multilevel inverter with selective harmonics elimination on reduce total harmonics distortion (THD) apply in standalone concept. 9-level cascaded H-bridge multilevel inverter is applied with optimize harmonics stepped waveform (OSHW) to compare performance with sinusoidal pulse width modulation (SPWM). In OSHW, selective harmonics elimination is used to reduce the low harmonics component which is 3rd, 5th and 7th harmonics. Genetic algorithm are applied to solve the non-linear equation on solving the best switching angle. The result show OHSW have lower THD then SPWM. Meanwhile OHSW eliminated low harmonics component by the aid of genetic algorithm which exist due to the low switching frequency.

Finite control set model predictive control of nine-switch AC/DC/AC converter

The nine-switch converter topology with 2 three-phase ac terminals has recently been utilized in the literature for ac to ac power conversion. Nonetheless, the existing control techniques essentially involve complicated linear controller design with special modulation schemes. This paper presents a simple yet high performance controller based on finite control set model predictive control (FCS-MPC) for ac/dc/ac power conversion using nine-switch topology. FCS-MPC algorithm is designed to control two ac terminals independently by making use of 27 combinations of voltage vectors. The first ac terminal which features an active front end rectifier with unity power factor is connected to power grid, while the second ac terminal is used to control three-phase load. Achievement of multiple control objectives within the same converter topology is made feasible by the use of cost function in FCS-MPC algorithm. Simulation results are presented to verify the functionality of the system.