T. F. Wrobel

On Heavy Ion Induced Hard-Errors in Dielectric Structures

Heavy ion induced failures in SiO2 and SiO2/Si3N4 composite capacitors were studied for ion linear energy transfers (LETs) from 15 to 85 MeV/(mg/cm2). Key findings of this study were the following: 1) hard errors are caused by a combination of energy deposited by the ion and from electrical conduction through the plasma channel formed by the ion strike, 2) there is an inverse linear relationship between ion energy deposition and the bias voltage required for composite device failure and 3) the angular dependence of the failure threshold voltage closely follows an inverse cosine relationship. Empirical equations are presented that allow the critical failure thresholds to be calculated from the ion LET for both silicon dioxide and metal-nitride-oxide-semiconductor (MNOS) composite devices. A failure model is proposed based on the energy deposition in the dielectric and rapid thermal diffusion of gate material through the dielectric.

Total-Dose Radiation and Annealing Studies: Implications for Hardness Assurance Testing

A series of experiments covering a wide range of dose rate, bias, and annealing conditions has been performed on CMOS test transistors and 2K SRAMs. These experiments, on both hardened and commercial technologies, were designed to address hardness assurance issues associated with total-dose laboratory testing. It is demonstrated that failure dose can be a complicated function of dose rate, and that a peak in the failure-dose versus dose-rate curve generally results when there is a change in failure mode. If only one failure mode exists, then the failure-dose versus doserate curve is monotonic. Implications of proposed changes in MIL-STD-883C, Method 1019.2 are examined in light of their impact on hardness assurance. Our findings support the proposed changes of (1) keeping the time between irradiation and test less than 1 hour and (2) of a more restricted range of dose rate, i.e., 100 to 300 rad(Si)/ s. In addition, it is recommended that zero volt bias be maintained on CMOS devices between irradiation and test. Finally, techniques are presented for relating total-dose hardness as measured in the laboratory to total-dose hardness in real-world space and weapon environments.

Current Induced Avalanche in Epitaxial Structures

A correlation is made between observed photoionization induced avalanche breakdown in epitaxial structures and the analysis of high-current effects in these devices using Poissons equation. The analysis shows that a photocurrent-stimulated conductivity modulation mechanism can lead to avalanche at the epitaxial-substrate junction at bias levels far below the usual breakdown voltages for the structures. Experimental data are presented for both VDMOS power-FET devices and bipolar npn epitaxial transistors which show junction avalanche at low bias levels.

Steady-State and Transient Radiation Effects in Precision Quartz Oscillators

Radiation effects on 5 MHz 5th overtone AT cut Premium-Q quartz resonators are evaluated, comparing sweeping processes and resonator fabrication procedures. The resonators were irradiated at operating temperatures in oven controlled oscillator test beds with pulsed 10 MeV electrons from 200 rads up to 1 Mrad as well as with continuous 60Co gamma rays. Steady-state (permanent) and transient radiation-induced frequency changes were measured, the persistence of radiative preconditioning was investigated and the effect on drift rate was evaluated. From saturation characteristics of the steady-state frequency offset as function of total electron dose, the formation rate cross sections of several radiation-induced crystal defects have been evaluated. Formation of at least one defect is sensitive to differences in the sweeping process. In some resonators, frequency recovery after irradiation is dominated by an exponential decay mechanism with a time constant of 3.7 days. Under continuous gamma ray exposure with dose rates between 10 and 90 rad/hour, the frequency response is characterized by a steep initial rise followed by different patterns of saturation and recovery.

Solutions to heavy ion induced avalanche burnout in power devices

A review of normal breakdown and current induced avalanche (CIA) breakdown mechanisms in silicon power transistors is presented. The applicability of the CIA model to heavy ion induced burnout is shown, and solutions to CIA in silicon power semiconductors are given. It is noted that solving the problem of CIA burnout in npn bipolar and n-channel DMOS devices is, at best, difficult. Several techniques of hardening these devices to the effects of heavy ion, dose-rate induced failure, and any other condition producing CIA are discussed. The most effective techniques are those that minimize the emitter current injection by reducing the emitter injection efficiency or making the parasitic bipolar more difficult to turn on. However, it is believed that the simplest solution to the problem is to use pnp bipolar and p-channel DMOS devices whenever possible. >

Snap-Back: A Stable Regenerative Breakdown Mode of MOS Devices

N-channel MOS transistors used in nMOS and in CMOS microelectronic circuits have a drain-to-source breakdown characteristic showing a negative resistance region. Activating this mode of operation leads to a drop in source-to-drain voltage and to a large drain current. Snap-back is not a four-layer (SCR, latch-up) phenomenon, but, like latch-up, can be initiated by current injection into the p-well, by avalanching junctions or by exposure to ionizing radiation. The sustaining voltage can be significantly below the drain-substrate avalanche voltage thereby limiting the maximum operating voltage. In this paper we present a qualitative model for snapback--local conductivity modulation occurring in the intrinsic base region of the parasitic bipolar transistor leading to regenerative feedback. Effects of process variations on the snap-back characteristics are presented as are triggering sensitivities to ionizing radiation.

Analysis of Transient Radiation Upset in a 2K SRAM

Experimental characterization of the effects of power supply interconnect resistance on the transient radiation induced upset level of a 2K SRAM and correlations with rail span collapse simulations are presented. The results show that the dose-rate upset threshold increases if columns of RAM cells are isolated from the Vss supply grid. The magnitude of this increase is predicted well by computer simulations.

Radiation characterization of a 28C256 EEPROM

Total-dose, dose-rate, and high-dose-rate memory retention results are presented for the SEEQ 28C256 floating-gate electrically erasable and programmable read-only memory (EEPROM). Total-dose failure levels are mode dependent, i.e., approximately 33 krad(Si) for reading and approximately 9.5 krad(Si) for writing. The write-mode failure level is dose-rate dependent, increasing from approximately 10 krad(Si) at approximately 11 rad(Si)/s to approximately 28 krad(Si) at approximately 0.1 rad(Si)/s. Average upset and latchup thresholds are 3.8*10/sup 8/ rad(Si)/s and 7.7*10/sup 8/ rad(Si)/s, respectively. No latchup windows were observed. Memory contents were retained following exposure up to 108 krad(Si) and following 1*10/sup 12/ rad(Si)/s. >

Silicon Solar Cell Damage from Electrical Overstress

A model for the prediction of electrical overstress failure in silicon solar cells based on bulk conduction has been developed. The model has been used to predict the threshold failure current versus pulse width for three types of concentrator cells and one flatplate cell. Threshold failure currents have been measured in each of the cell types using a high voltage pulser that was transformer coupled to the cell impedance. Threshold failure currents for a 10 ¿s exponential pulse of 3-15 kiloamperes were measured for the concentrator cells, in good agreement with model predictions. However, the measured reverse failure currents in the flatplate cell were 4-12 amperes for pulse widths of 10-100 ¿s, compared to predicted values of 200-300 amperes. The failure mechanism for the flatplate cell was related to surface or edge currents and hence would require a different model. This study was directed toward pulse widths of interest for the lightning environment but may be extended to the EMP or SGEMP environments with further analysis.

SAND83-1541C Seeing through the Latch-Up Window

The observation of radiation-induced latch-up windows has caused doubt in the validity of accepted latch-up screens. Models giving a plausible explanation of latch-up windows are presented which show that they are only a special case of latch-up as explained by many investigators and can be treated accordingly. Furthermore, they are eliminated when latch-up is prevented by either neutron irradiation of the devices or utilization of epitaxial substrates.