T. Parra

A 5.4 mW/0.07 mm

An integrated 2.4 GHz CMOS receiver front-end according to the IEEE 802.15.4 standard is presented in this paper. It integrates the overall RF part, from the balun up to the first stage of the channel filter, as well as the cells for the LO signal conditioning. The proposed architecture is based on a 6 MHz low-IF topology, which uses an inductorless LNA and a new clocking scheme for driving a passive mixer. When integrated in a 90 nm CMOS technology, the receiver front-end exhibits an area of only 0.07 mm2, or 0.23 mm2 when including an input integrated balun. The overall chip consumes 4 mA from a single 1.35 V supply voltage and it achieves a 35 dB conversion gain from input power in dBm to output voltage in dBvpk, a 7.5 dB NF value, -10 dBm of IIP3 and more than 32 dB of image rejection.

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Noise properties of AlGaAs/InGaAs/GaAs pseudomorphic HEMTs (PHEMTs) have been investigated simultaneously in the low and intermediate frequency range (10 Hz to 150 MHz) and in the microwave range (4 to 18 GHz) and compared to the noise of more classical devices such as MESFETs and GaAlAs/GaAs HEMTs. Unlike the other commercially available devices, PHEMTs exhibit the unique capability of providing simultaneously state-of-the-art microwave noise performance and a reasonable low-frequency excess noise. >

2.4 GHz Front-End Receiver in 90 nm CMOS for IEEE 802.15.4 WPAN Standard

This paper deals with an original design and realization of high performance micromachined millimeter wave passive circuit on silicon. An appropriate coupling between two coplanar micromachined lines and a dielectric resonator acting on its whispering gallery modes have allowed a loaded quality factor ranging from 500 to 2400 at 35 GHz and leading to a Micromachined Dielectric Resonator Oscillator (MDRO) realization. From finite element 2D simulations, we have obtained unloaded quality factor of 2040 at 77 GHz and 95 GHz using an original micromachined silicon dielectric resonator.

Noise in AlGaAs/InGaAs/GaAs pseudomorphic HEMTs from 10 Hz to 18 GHz

The aim of the 2.4GHz front-end receiver presented in this paper is the minimization of both cost and energy consumption, focusing on WPAN IEEE 802.15.4 transceivers. It includes the entire RF part, from the balun to the first stage of the channel filter, as well as the LO signal conditioning cells. The proposed architecture uses an unmatched inductorless LNA and a new clocking scheme on a standard passive mixer. Compared to previously reported IEEE 802.15.4 receivers, an area reduction by at least 70% is achieved. The power consumption is relatively low at 5.4mW with a state-of-the-art noise and linearity performance. The receiver front-end operates at 1.35V. It is implemented in a 90nm CMOS technology using two thick metals, and alucap with RFMOM capacitors.

Design and realization of high Q millimeter-wave structures through micromachining techniques

This paper deals with an original design of an active power splitter featuring a differential output presenting a greatly enhanced even mode rejection. The proposed circuit consists in two cascaded common emitter and common collector differential pairs. For achieving the best performance, it is shown that each of these two differential pairs requires a specific common node to ground impedance that is discussed. The circuit has been implemented on a 0.25¿m SiGe BiCMOS process and exhibits anticipated phase and amplitude broadband unbalance less than 6.5° and 0.6 dB respectively all over the 6-27 GHz frequency range. At 20 GHz, a common mode rejection ratio better than 43 dB is predicted, i.e. a maximum 0.12 dB/0.35° output signal unbalance.

A 5.4mW 0.07mm 2 2.4GHz Front-End Receiver in 90nm CMOS for IEEE 802.15.4 WPAN

Describes the design and performance of an 8-GHz MMIC (monolithic microwave integrated circuit) MESFET (metal-semiconductor FET) power limiter. This limiter incorporates a special gate biasing scheme and makes use of appropriate load conditions which reduce the unexpected phase variations experienced by the signal through the device. Measured performances (phase variations less than 8 over a 22-dB input power range) are found to be in agreement with the theoretical ones obtained from large signal simulations. >

An original SiGe active differential output power splitter for millimetre-wave applications

This paper deals with the investigation of the low-frequency (LF) noise properties of InP based HEMTs. We have found that a significant part of noise originates from the sample free surface and can be minimized by an appropriate silicon nitride passivation layer. Additional measurements suggest that 1/f noise and Lorentzian noise is generated in the AlInAs donor layer of the devices. A comparative study shows that our devices compare well with the state of the art of HEMTs devices in term of excess noise. In order to investigate the correlation between phase noise and LF noise, both residual and oscillator phase noise measurements were carried out. The obtained results compare well with the state of the art in terms of residual and phase noise performance.

X-band low phase distortion MMIC power limiter

A simple design technique for a GaAs FET limiter exhibiting minimum phase distortion is presented. The key idea in removing phase distortion by selecting an appropriate device and designing a bias circuit is based on the observed properties of the gate barrier under large-signal conditions. Some illustrative examples and simulation results are presented. The proposed technique is suitable for monolithic microwave integrated circuit (MMIC) design. >

Low-frequency noise behavior of InP-based HEMTs and its connection with phase noise of microwave oscillators

This paper provides a detailed analysis of a SOI CMOS tunable capacitor for antenna tuning. Design expressions for a switched capacitor network are given and quality factor of the whole network is expressed as a function of design parameters. Application to antenna aperture tuning is described by combining a 130 nm SOI CMOS tunable capacitor with a printed notch antenna. The proposed tunable multiband antenna can be tuned from 420 MHz to 790 MHz, with an associated radiation efficiency in the 33-73% range.

Design of a low phase distortion GaAs FET power limiter

This paper reports an original design methodology for low voltage high performances Gilbert mixers in the DCS range. We present for the first time a real BiCMOS structure featuring +10.6 dB conversion gain, +6.7 dBm TP3, 10.3 DSB noise figure under a 2.2 V supply voltage, which is among the best results ever reported.