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Dive into the research topics where Ta-Ming Kuan is active.

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Featured researches published by Ta-Ming Kuan.


Journal of The Electrochemical Society | 2009

ZnSe Nanowire Photodetector Prepared on Oxidized Silicon Substrate by Molecular-Beam Epitaxy

Chih-Hung Hsiao; Shoou-Jinn Chang; S. B. Wang; S. P. Chang; T. C. Li; W. J. Lin; Chih-Hsin Ko; Ta-Ming Kuan; Bohr-Ran Huang

We reported the growth of ZnSe nanowires on oxidized Si substrate by molecular-beam epitaxy. It was found that average length, average diameter, and density of the ZnSe nanowires were 1.2 μm, 48 nm, and 1.04 X 10 7 cm -2 , respectively. It was also found that the ZnSe nanowires were structurally uniform and defect-free with a pure zinc blend structure. UV photodetectors were then fabricated by sputtering a thick Au film through an interdigitated shadow mask onto the ZnSe nanowires. It was found that photocurrent to dark current contrast ratio of our ZnSe nanowire photodetector was >90 with 0.1 V applied bias.


IEEE Transactions on Electron Devices | 2002

InGaN/GaN light emitting diodes with a p-down structure

Yan-Kuin Su; Shoou-Jinn Chang; Chih-Hsin Ko; Jiann-Fuh Chen; Ta-Ming Kuan; Wen-How Lan; Wen-Jen Lin; Ya-Tung Cherng; J. B. Webb

Nitride-based p-down blue light emitting diodes (LEDs) were successfully fabricated. It was found that we could improve the crystal quality of these nitride-based p-down LEDs by inserting a codoped interlayer between the p-type cladding layer and MQW active layers. It was also found that the turn-on voltage could be reduced from 15 V to less than 5 V for the p-down LED with codoped layer and tunnel layer. The 20 mA output power was 1 mW for the p-down LED with an Mg+Si codoped interlayer and a rough p-tunnel layer.


IEEE Transactions on Electron Devices | 2008

The Effects of Mechanical Uniaxial Stress on Junction Leakage in Nanoscale CMOSFETs

Tzu-Juei Wang; Chih-Hsin Ko; Shoou-Jinn Chang; San-Lein Wu; Ta-Ming Kuan; Wen-Chin Lee

This paper reports the influences of uniaxial mechanical stress on the reverse-biased source/drain to substrate junction leakage of state-of-the-art 65 nm CMOS transistors. For n-channel metal-oxide-semiconductor (NMOS) transistors, the band-to-band tunneling (BTBT) dominates the junction leakage current due to heavily doped junction and pocket implants. However, for p-channel metal-oxide-semiconductor (PMOS) transistors with embedded SiGe source/drain, the leakage current is found to result from both BTBT and generation current due to defects generated in the SiGe layer and at the SiGe/Si interface. A four-point bending technique is used to apply mechanical uniaxial stress on NMOS and PMOS devices along the longitudinal direction. It was found that the leakage current of both devices increases (decreases) with applied uniaxial compressive (tensile) stress, and that the strain sensitivity of the junction leakage of NMOS transistors is much weaker than that of PMOS transistors. By combining the bending technique with process strained Si (PSS) technology, additional stress was applied to NMOS and PMOS with high built-in stress to investigate the characteristics of junction leakage under extremely high uniaxial stress. It is shown that uniaxial tensile stress can both enhance the NMOS device performance and decrease the junction leakage. However, for the PMOS, there exists a tradeoff between boosting the transistor performance and decreasing the junction leakage current, so there is a limit in the amount of compressive stress that can be beneficially applied.


Japanese Journal of Applied Physics | 2002

P-Down InGaN/GaN Multiple Quantum Wells Light-Emitting Diode Structure Grown by Metal-Organic Vapor-Phase Epitaxy.

Chih-Hsin Ko; Yan-Kuin Su; Shoou-Jinn Chang; Ta-Ming Kuan; Chung-I Chiang; Wen-How Lan; Wen-Jen Lin; J. B. Webb

An inverted or p-down InGaN/GaN multiple quantum wells (MQW) light-emitting diode (LED) structure is studied. The crystalline quality of the quantum wells is comparable to that of the n-down structure by using a Si or In co-doped GaN:Mg layer underneath the active layer. It was found that I–V characteristics can be improved by insertion of a tunnel layer, either a 3D growth GaN:Mg layer or an AlGaN/GaN superlattice layer. The feasibility of such a structure for practical application is also evaluated by luminescence measurement.


IEEE Electron Device Letters | 2003

Flicker noise of GaN-based heterostructure field-effect transistors with Si-doped AlGaN carrier injection layer

Yan-Kuin Su; Sun-Chin Wei; Ruey-Lue Wang; Shoou-Jinn Chang; Chih-Hsin Ko; Ta-Ming Kuan

Aluminum gallium nitride/gallium nitride (AlGaN/GaN) heterostructure field effect transistors (HFETs) with and without Si-doped AlGaN layer were fabricated and investigated. HFETs with the Si-doped AlGaN carrier-injection layer show better DC performance, and the transconductance is 150 mS/mm. However, the HFETs with Si-doped AlGaN layer present the deviation from the 1/f noise at low frequency. The Lorentz shape was observed in the noise spectrum. It suggests that traps might be more pronounced in this kind of structure. Therefore, the DC characteristics of HFETs can be improved by the insertion of Si-doped AlGaN layer, but it can result in more low-frequency noise with the carrier-injection layer.


Japanese Journal of Applied Physics | 2002

On the Carrier Concentration and Hall Mobility in GaN Epilayers

Chih-Hsin Ko; Shoou-Jinn Chang; Yan-Kuin Su; Wen-How Lan; Jone F. Chen; Ta-Ming Kuan; Yao-Cong Huang; Chung-I Chiang; J.B. Webb; Wen-Jen Lin

The dependence of Hall mobility and carrier concentration in GaN epilayers on light illumination was examined. It was found that Hall mobility and electron concentration both increased after illumination with red laser (632.8 nm) and green laser (530 nm). However, no changes in Hall mobility and carrier concentration were found, if IR-laser (850 nm) was used. The results reveal that deep-level defects were excited and hence extra carriers were generated by light illumination. The influence is more pronounced for thinner films. These observations indicate that donor-like defect-related states were located 1.48 to 2.33 eV below the conduction band edge.


Japanese Journal of Applied Physics | 2003

High optical-gain AlGaN/GaN 2 dimensional electron gas photodetectors

Ta-Ming Kuan; Shoou-Jinn Chang; Yan-Kuin Su; Chih-Hsin Ko; J. B. Webb; J. A. Bardwell; Y. Liu; H. Tang; Web-Jen Lin; Ya-Tung Cherng; Wen-How Lan

Nitride-based AlGaN/GaN heterostructure two dimensional electron gas (2DEG) photodetectors have been successfully fabricated. By using such an AlGaN/GaN heterostructure, we could significantly reduce the recombination of photogenerated carriers and thus achieve an extremely high photodetector responsiveness. At an incident light wavelength of 240 nm, it was found that the responsiveness could reach 5.2×109 A/W.


Materials Chemistry and Physics | 2003

Two-step epitaxial lateral overgrowth of GaN

Chih-Hsin Ko; Yan-Kuin Su; Shoou-Jinn Chang; Tzong-Yow Tsai; Ta-Ming Kuan; Wen-How Lan; J. C. Lin; W. J. Lin; Ya-Tung Cherng; J.B. Webb

A two-step epitaxial lateral overgrowth (ELO) method was proposed to improve the quality of GaN-based epitaxial layers. In the first step, we grew a three-dimensional GaN low temperature buffer layer at 520 °C for different amount of time, and the second step is similar to conventional ELO. For two-step ELO GaN samples on SiO2 stripes along 〈1120〉 direction, it was found that an 8 min first step growth time could provide us the highest lateral to vertical growth rate ratio and the largest angle between sidewalls and basal plane. Under such growth conditions, we could achieve a surface root-mean-square (rms) roughness of 0.480 nm and an etch pits density (EPD) of 1.6×107 cm−2 in the stripe regions. The surface morphology of the two-step ELO GaN sample is also much better than that of the one-step ELO GaN sample.


IEEE Transactions on Electron Devices | 2008

Investigation of Metallized Source/Drain Extension for High-Performance Strained NMOSFETs

Tzu-Juei Wang; Chih-Hsin Ko; Hong-Nien Lin; Shoou-Jinn Chang; San-Lein Wu; Ta-Ming Kuan; Wen-Chin Lee

Extrinsic source/drain series resistance (R SD) is becoming inevitably dominant in state-of-the-art CMOS technologies as the intrinsic device resistance continues to scale with channel length dictated by the Moores Law. As a result, advanced scaling techniques to achieve a lower intrinsic device resistance become less effective, particularly for NMOSFETs. With an attempt to better understand R SD impacts and identify the next key technology enabler, high-performance strained NMOSFETs featuring metallized (NiSi) source/drain extension (M-SDE) are investigated due to its cost-effective process and good short-channel scalability. The spacing between metallized extension and gate electrode edge is shown to play a very important role in R SD reduction and can significantly affect the electrical characteristics of M-SDE NMOSFETs. Tradeoff between R SD reduction and device integrity like junction leakage and reliability is found when the extension-to-gate edge spacing is modulated. On the other hand, by optimizing the NiSi-to-gate edge spacing, M-SDE NMOSFETs exhibit a higher on-current (I ON) and a higher strain sensitivity while maintaining comparable drain-induced barrier lowering, subthreshold swing, I OFF , and hot-carrier reliability as compared with the conventional SDE devices.


international conference on indium phosphide and related materials | 2010

N + -InGaAs/InAlAs recessed gates for InAs/AlSb HFET development

Wei-Zhi He; Heng-Kuang Lin; Pei-Chin Chiu; Jen-Inn Chyi; Chih-Hsin Ko; Ta-Ming Kuan; Meng-Kuei Hsieh; Wen-Chin Lee; Clement Hsingjen Wann

In this work, N<sup>+</sup>-InGaAs/InAlAs recessed gates for InAs/AlSb HFET development are presented. Highly doped N<sup>+</sup>-InGaAs cap layers are used to decrease the parasitic resistances in contact and access regions. As-grown modulation-doped epitaxy materials exhibit a Hall mobility of 14,200 cm<sup>2</sup>/V s and a sheet density of 6.15 ×10<sup>12</sup> cm<sup>−2</sup>, while a mobility of 14,600 cm<sup>2</sup>/V s and a sheet density of 5.61×10<sup>12</sup> cm<sup>−2</sup> are shown after removal of the N<sup>+</sup>-InGaAs cap. Benefiting the energy band lowering using the highly doped cap layers, a low contact resistance of 0.06 Ω-mm is achieved. DC performances of I<inf>DSS</inf>=862mA/mm and g<inf>m, peak</inf>=927mS/mm and RF performances of f<inf>T</inf>=24GHz and f<inf>max</inf>=51GHz are demonstrated in a 2.1μm-gate-length device. An f<inf>T</inf>-L<inf>g</inf> product is as high as 51 GH-μm.

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Shoou-Jinn Chang

National Cheng Kung University

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Yan-Kuin Su

National Cheng Kung University

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Wen-How Lan

National University of Kaohsiung

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Ya-Tung Cherng

National Cheng Kung University

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Sun-Chin Wei

National Cheng Kung University

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J.B. Webb

National Research Council

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J. C. Lin

National Cheng Kung University

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