Tadahiko Sakai

Productivity improvement of copper pillar flip-chip package by pre-applied materials and press machine

In this report, authors describe improvement effort of fine pitch flip-chip interconnection based on pre-applied material process. For evaluation, IC with copper pillar bumps (50 μm pitch) and organic boards (FR-5) have been used. NCF and B-stage material have been used as pre-applied connecting material. As a result, we have developed temporary alignment and subsequent batch bonding process to improve productivity.

Advanced soldering paste suitable for Package-on-Package process

PoP technology is emerging as an alternative solution to SiP since it has advantage of easier testing and sourcing Flux-dipping PoP has risk of cold open joints due to package reflow warpage. Controlling warpage is challenging especially when top/bottom package come from different suppliers. New SMT paste STAMP was developed to enlarge process window of PoP stacking. The paste consists of higher m.p. metal flakes uniformly dispersed in flux, which is effective to fill ball-pad gap. SMT trial showed better PoP stacking yield of STAMP. Also, BLR of STAMP-build PoP was as good as flux- build PoP.