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Dive into the research topics where Tadashi Maeda is active.

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Featured researches published by Tadashi Maeda.


electronic components and technology conference | 2007

High Density PoP (Package-on-Package) and Package Stacking Development

Moody Dreiza; Akito Yoshida; Kazuo Ishibashi; Tadashi Maeda

This paper presents information concerning high density package-on-package (PoP) development which utilizes 0.5 mm top land pitch with solder on pad (SOP). Depending on system configuration and end application PoP has inherent advantages over other packaging configurations (such as MCP or SCSP). The advantages offered by PoP in terms of memory flexibility and easy testing compared to ASIC+memory die stacking have been well documented in previous papers by Yoshida et al.. Thus, PoP has seen rapid adoption in consumer handheld electronics including the cellular and MP3 sectors to name a few. The demands of increased functionality coupled with footprint constraints naturally means that finer pitches need to be introduced into all packaging technologies. While this introduces its own set of challenges for traditional chip-scale-packages (CSPs) the situation becomes critical in the PoP structure since finer pitches translate into less standoff between the packages. It was for this reason that the investigation of SOP covered in this paper was deemed to be necessary. The paper covers a description of the test vehicle, commercial board assembly process and board assembly materials investigated. The resulting stacking yields and board level reliability (BLR) results are discussed in detail. These results show that package stacking yields are very much a factor of the materials selected for top package dipping as well as overall PoP package design. Overall stacking and BLR results conformed to high volume yield expectations.


international conference on electronic materials and packaging | 2006

Advanced soldering paste suitable for Package-on-Package process

Tadashi Maeda; Tadahiko Sakai; Shoji Sakemi; Kazuo Ishibashi

PoP technology is emerging as an alternative solution to SiP since it has advantage of easier testing and sourcing Flux-dipping PoP has risk of cold open joints due to package reflow warpage. Controlling warpage is challenging especially when top/bottom package come from different suppliers. New SMT paste STAMP was developed to enlarge process window of PoP stacking. The paste consists of higher m.p. metal flakes uniformly dispersed in flux, which is effective to fill ball-pad gap. SMT trial showed better PoP stacking yield of STAMP. Also, BLR of STAMP-build PoP was as good as flux- build PoP.


Archive | 2001

Semiconductor device, method of manufacturing the device and mehtod of mounting the device

Tadahiko Sakai; Mitsuru Ozono; Tadashi Maeda


Archive | 1999

Method of forming solder bump and method of mounting the same

Tadashi Maeda; Tadahiko Sakai


Archive | 2001

Semiconductor device, method of manufacturing the device and method of mounting the device

Tadahiko Sakai; Mitsuru Ozono; Tadashi Maeda


Archive | 2005

Paste For Soldering And Soldering Method Using The Same

Tadashi Maeda; Tadahiko Matsushita Electric Industrial Co. Sakai


Archive | 2012

Electronic component mounting line and electronic component mounting method

Tadashi Maeda; Hiroki Maruo; Tsubasa Saeki


Archive | 2006

Method for soldering electronic component and soldering structure of electronic component

Tadahiko Sakai; Tadashi Maeda; Mitsuru Ozono


Archive | 2005

Flux for Soldering and Soldering Process

Tadashi Maeda; Tadahiko Sakai


Archive | 2005

Soldering flux and soldering method

Tadashi Maeda; Tadahiko Sakai

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