Tae-Yoo Kim

Ni full-filling into Al2O3/Al film with etched tunnels using a polyethylene glycol solution bath in electroless-plating

Ni/Al2O3/Al film was fabricated for a high performance capacitor using electrochemical etching, anodizing, and electroless-plating. The focus of this study was to form seamless and void-free Ni electrodes on Al2O3/Al with etched tunnels. The conventional deposition method of metal was limited to full-fill for the Al tunnel pits with a high aspect ratio, a depth of about 40 μm, and diameters of about 0.5–1 μm. Nevertheless, Ni filling in tunnel pits was achieved through electroless-plating for the first time, producing a seamless and void-free electrode. The authors used a polyethylene glycol solution bath to block the Pd on top of the tunnel prior to electroless-plating, which enabled the Ni to deposit preferentially at the bottom, leading to a filling from the bottom to the top. Finally, the capacitance density for the etched and Ni electroless plated films was 220 nF/cm2 while that for a film without any etch tunnel was 12.5 nF/cm2.

Electroless Ni alloy plating as a diffusion barrier for through silicon vias in three-dimensional packaging

Ni- and Co-based amorphous films are alternative diffusion barrier materials for Cu interconnection in three-dimensional (3D) packaging applications. In this paper, electroless Ni–P and Ni–W–P films deposited in through-silicon vias (TSVs) were prepared as a diffusion barrier and seed layer of Cu filling by using Sn–Pd activation pretreatment. The thermal stability of the electroless Ni alloy films subjected to rapid thermal annealing (RTA) in H2 atmosphere was investigated. The barrier properties of the electroless Ni alloy films were evaluated over a range of temperatures using auger electron spectroscopy (AES) and energy dispersive X-ray spectroscopy (EDS) line-scan. The microstructures, crystal structures and electrical resistivity were also examined. It was found that Ni alloy films are amorphous as deposited, that the films retain amorphous or amorphous-like structures after undergoing annealing at 400 °C for 1 h, and that they are feasible for the diffusion barrier layer for 3D Cu interconnect technology.

Preparation and Characterization of (Ba0.8Sr0.2)TiO3–Al2O3 Composite Oxide for Thin Film Capacitor

Barium strontium titanate–alumina composites were fabricated using a sol–gel and anodizing process for high performance thin film capacitors and the properties of the films were studied. The (Ba0.8Sr0.2)TiO3 (BST) films were formed by spin coating and subsequent annealing at 150–550 °C. The respective annealed films were anodized in a neutral borate solution. The capacitance density increased with increasing annealing temperature up to 450 °C but decreased at 550 °C. The capacitance density was approximately 28.46% higher with the BST coating than without the BST layer.

Power Enhancement of Lithium-Ion Batteries by a Graphene Interfacial Layer.

We achieved a method for power enhancement of heavy-duty lithium-ion batteries (LIBs) by synthesizing a graphene interfacial layer onto the anode copper current collector (ACCC). We tested fabricated coin cells, which used either 35-μm-thick rolled pristine copper foil or graphene synthesized onto the pristine copper foil for power output estimation of the LIBs. We observed the copper surface morphology with a scanning electron microscope (SEM). Raman spectroscopy was used to measure the bonding characteristics and estimate the layers of graphene films. In addition, transmittance and electrical resistance were measured by ultra-violet visible near-infrared spectroscopy (UV-Vis IR) and 4 point probe surface resistance measurement. The graphene films on polyethylene terephthalate (PET) substrate obtained a transmittance of 97.5% and sheet resistance of 429 Ω/square. Power enhancement performances was evaluated using LIB coin cells. After 5C current discharge rate of -1.7 A/g reversible capacity of 293 mAh/g and 326 mAh/g were obtained for pristine and synthesized graphene anode current collectors, respectively. The graphene synthesized onto the ACCC showed superior power performance. The results presented herein demonstrate a power enhancement of LIBs by a decrease in electron flow resistivity between active materials and the ACCC and removal of the native oxide layer on the anode copper surface using high quality graphene synthesized onto the ACCC.

Silicon interposer BGA package with a Cu-filled through silicon via and a multilayer redistribution layer fabricated via electroplating.

As large-scale integrated circuit chips become smaller, conventional organic buildup substrates can no longer support them. To resolve this problem, silicon interposers with through silicon via (TSV) technology are gaining recognition as alternative solution to provide high-density interconnection, improved electrical performance due to shorter interconnection from the die to substrate for nano-scale devices. In this study, we fabricated a silicon interposer to achieve high density and high performance packages. Via holes were etched via the Bosch process using a deep reactive ion etcher and SiO2 formed with a diffusion furnace as the diffusion barrier of the Cu electrode. TSVs were filled with Cu under various electroplating conditions. After Cu filling, a Cu post was formed directly using the over-filled Cu electrode through a chemical mechanical polishing process. A double-layer redistribution layer was formed on one side of the interposer using a lift-off process. Sn-3.5% Ag solder bumps 40 μm in diameter were formed directly on the Cu post on another side of the interposer using electroplating and the reflow method.