Takahiro Onai

Negative bias temperature instability of pMOSFETs with ultra-thin SiON gate dielectrics

The negative bias temperature instability (NBTI) of pMOSFETs with ultra-thin gate dielectrics was investigated from four points of view: basic mechanism of NBTI, dependence of NBTI on gate dielectric thickness, mechanism of NBTI enhancement caused by addition of nitrogen to the gate dielectrics, and possibility of applying SiON gate dielectrics with a high concentration of nitrogen. By investigating the behavior of FET characteristics after NBT stresses were stopped, it was clarified that a portion (60%, in our case) of hydrogen atoms released by the NBT stress remains in the gate dielectric in the case of a 1.85-nm-thick NO-oxynitride gate dielectric. The existence of the hydrogen was shown to lead to the generation of positive fixed charges in the gate dielectric. It was also found that NBTI depends little on gate dielectric thickness. Moreover, we revealed that the origin of NBTI enhancement by incorporating nitrogen into gate dielectrics is the property of attracting H/sub 2/O or OH. We speculate that this property is due to the existence of positive fixed charges induced by undesirable nitrogen. We evaluated NBTI immunity of SiN gate dielectrics with an oxygen-enriched interface (OI-SiN) in which high carrier mobility was obtained by reducing positive fixed charges. OI-SiN gate dielectrics with EOTs of 1.4 and 1.6 nm were found to have sufficient lifetime for practical use under 1 V operation.

Remote-charge-scattering limited mobility in field-effect transistors with SiO2 and Al2O3∕SiO2 gate stacks

We examined, both experimentally and theoretically, the mobility reduction in metal-insulator-semiconductor field-effect transistors (MISFETs) limited by remote charge scattering. The accuracy of the mobility calculations was confirmed by agreement with experiments on MISFETs with pure SiO2 gate dielectrics, in which mobility is reduced due to scattering from the depletion charges in the polycrystalline silicon gate. In MISFETs with Al2O3∕SiO2 gate stacks, we could not identify the contributions from the remote phonon scattering by using low-temperature measurements of the mobility. The experimental mobility reduction is explained by a model in which both negative and positive charges are located at the Al2O3∕SiO2 interface. According to this model, the mobility increases with the interfacial SiO2 thickness. We confirmed this by fabricating MISFETs with various interfacial SiO2 thicknesses.

130-GHz f/sub T/ SiGe HBT technology

A real emitter/base heterojunction was formed with the optimization of the vertical profile of the transistor, and good crystallinity of SiGe was achieved by using a UHV/CVD system with high-pressure H/sub 2/ precleaning of the substrate. As a result, a record cutoff frequency up to 130 GHz and the current gain up to 29,000 were obtained with a graded and uniform Ge profiles, respectively.

Electro-luminescence from ultra-thin silicon

Ultra-thin single crystal silicon with the (100) surface formed by the local-oxidation-of-silicon (LOCOS) on a silicon-on-insulator (SOI) substrate becomes a quasi-direct band-gap semiconductor due to the quantum mechanical confinement effect. The device is a simple pn diode in a planar structure. Electro-luminescence (EL) has been observed by the lateral carrier injections into the two-dimensional quantum well.

Improved theory for remote-charge-scattering-limited mobility in metal–oxide–semiconductor transistors

Transport theory is extended to include the remote-charge-scattering-limited electron mobility of metal–oxide–semiconductor field-effect transistors. We evaluated remote-charge-scattering from the depletion charge in the polycrystalline silicon gate. We obtained an analytical expression for the scattering potential, by taking image charge, screening, and quantization effects into account. The potential increases with decreasing gate-oxide thickness, which results in a mobility degradation at lower vertical electric fields. The calculated mobility agrees well with recent measurements.

A selective-epitaxial SiGe HBT with SMI electrodes featuring 9.3-ps ECL-gate delay

A selective-epitaxial SiGe base heterojunction bipolar transistor (HBT) with self-aligned stacked metal/IDP (SMI) electrodes is proposed. The SiGe-base structure, self-aligned to the 0.1-/spl mu/m-wide emitter, effectively reduces collector capacitance and SMI electrodes provide low parasitic resistances. A BPSG/SiO/sub 2/-refilled trench was introduced to reduce the substrate capacitance. A 9.3-ps delay time in a differential ECL ring oscillator was achieved.

Silicon light-emitting transistor for on-chip optical interconnection

The authors propose a light-emitting field-effect transistor with the active layer made of the ultrathin single crystal silicon with the (100) surface orientation. The ambipolar carrier injections from the highly impurity doped regions to the ultrathin silicon are achieved in complementary-metal-oxide-semiconductor compatible planar structures and the optical intensities are controlled by the gate voltage. By using the device, they have demonstrated that a simple electrical signal can be transferred by light and detected on the same silicon chip as photocurrents controlled by the gate bias.

Ultra-thin-base Si bipolar transistor using rapid vapor-phase direct doping (RVD)

A novel doping method called rapid vapor-phase direct doping (RVD) is developed to form ultra-shallow junctions. The base region of a conventional bipolar transistor is formed by this method, and in ultra-narrow 25-nm base is obtained. The Gummel plot of this device shows almost ideal characteristics. This result suggests that this method does not induce any defects which cause a leakage current. RVD is a thermal diffusion method using hydrogen as a carrier gas and B/sub 2/H/sub 6/ as a source gas. In this method, the impurity atoms directly diffuse from the vapor phase into silicon by a rapid thermal process without a boron-glass layer or metallic boron layer. By varying the source gas flow rate, doping time, and temperature, ultra-shallow junctions below 40 nm with controlled surface concentrations are successfully formed. An ultra-shallow 20-nm junction with surface boron concentration of 4*10/sup 18/ cm/sup -3/ is obtained at 800 degrees C for 5 min with B/sub 2/H/sub 6/ flow rate of 30 ml/min. >

Effects of remote-surface-roughness scattering on carrier mobility in field-effect-transistors with ultrathin gate dielectrics

We examined effects of the remote surface roughness, which is the roughness between the polycrystalline silicon gate and gate dielectric, on the inversion carrier mobility of metal-insulator-semiconductor field-effect-transistors with ultrathin gate dielectrics. We calculated the effective mobility by the linear response theory and found that the scattering from the remote surface roughness reduces the effective mobility especially at high vertical fields. The effective mobility is severely reduced, if the correlation length of the remote surface roughness is comparable to the inverse of thermal de Broglie wave number. We show that the hole mobility reduction experimentally found for the transistor with the Al2O3 gate dielectric can be explained by this scattering.

Formation of ultrashallow p+ layers in silicon by thermal diffusion of boron and by subsequent rapid thermal annealing

Boron atoms are incorporated into (100)Si wafers by heating the substrates at 800 °C for 30 min in a (B2H6+H2) atmosphere and by subsequent rapid thermal annealing above 900 °C. Atomic and carrier‐concentration profiles of boron‐doped layers have been examined by a secondary‐ion mass spectrometry and by differential Hall measurements, respectively. Experimental results have clearly shown that ultrashallow p+ layers, 300 A thick, with a surface carrier concentration of 7.26×1019/cm3 can be formed by diffusion of boron at 800 °C and by subsequent RTA at 100 °C.