Takahisa Nitta

Formation of Copper Thin Films by a Low Kinetic Energy Particle Process

This paper reports on low kinetic energy particle bombardment of a growing film surface employed to grow high-quality copper thin films on silicon and SiO{sub 2} with ideal metal/substrate interface characteristics. It is shown that the energy of Ar ions concurrently bombarding a growing film surface determines the crystal structure of the film. Under relatively low-energy ion bombardment conditions (100)- or (111)-oriented films are obtained either on (100)Si (111)Si, or SiO{sub 2} surfaces when large ion bombardment energies are employed. It has been found that (111)-oriented films thus created on SiO{sub 2} are metastable and easily transform by thermal annealing into completely (100)-oriented films with large grains of about 100 {mu}m. This unique transformation phenomenon has been successfully applied to the formation of almost single-crystal (100)-oriented Cu islands on SiO{sub 2}. In situ substrate surface cleaning by extremely low energy Ar ion bombardment has enabled the formation of ideal metal/silicon contacts without any postmetallization alloying heat cycles. Excellent adhesion of Cu thin films on SiO{sub 2} has also been demonstrated by the employment of the in situ substrate surface cleaning.

Evaluating the Large Electromigration Resistance of Copper Interconnects Employing a Newly Developed Accelerated Life‐Test Method

An accelerated electromigration life-test method has been developed to evaluate the large electromigration resistance of Cu interconnects in a very short period of test time. The essence of the acceleration technique employed here is to use stress current more than 10 7 A/cm 2 and to utilize the self-heating of the test interconnect for giving temperature stress. Moreover, to avoid uncontrollable thermal runaway and resultant interconnect melting, we adopted an efficient cooling technique that immediately removes the joule heat and keeps the interconnect temperature constant

Electrical Properties of Giant‐Grain Copper Thin Films Formed by a Low Kinetic Energy Particle Process

Fomnation of giant-grain copper thin films on SiO 2 by a low-kinetic energy particle process followed by thermal annealing has been investigated. When Cu films are grown on SiO 2 by the process under a sufficient amount of energy deposition, they exhibit almost perfect crystal orientation conversion from Cu(111) to Cu(100) upon themnal annealing. Such crystal orientation conversion is accompanied by the giant grain growth in the film as large as 100 μm. With regard to these phenomena, the effects of the ion flux density and of the ion bombardment energy have been studied

Room‐temperature copper metallization for ultralarge‐scale integrated circuits by a low kinetic‐energy particle process

Copper films were epitaxially grown on (100)Si substrates at room temperatures utilizing low kinetic‐energy particle bombardment of growing copper film surfaces. The crystallographic structure of the film, such as (100) or (111) orientation, was selected by controlling the energy of incident particles. Low‐temperature, damage‐free substrate surface cleaning has also been realized by the low kinetic‐energy particle process, which has made it possible to form ideal metal‐semiconductor contacts without employing any alloying heat cycles.

Reverse-bias current reduction in low-temperature-annealed silicon pn junctions by ultraclean ion-implantation technology

Reduction in the reverse‐bias current in low‐temperature‐annealed silicon pn junctions has been studied. It has been shown that the transition region existing underneath the ion‐implantation‐generated amorphous layer and the contamination incorporated into this region play a decisive role in determining the reverse current level. In order to minimize the contamination involvement into the transition region, ultraclean ion‐implantation technology has been developed. Ion implantation was carried out under a UHV (5×10−10 Torr) condition in order to minimize the recoil implantation of adsorbed contamination at the surface. The contamination due to the high‐energy ion‐beam sputtering of component parts in the ion implanter has also been suppressed. As a result, a low reverse‐bias current level of about 1.2×10−7 A/cm2 has been obtained for arsenic‐implanted n+p junctions annealed at 550 °C, which is more than two orders of magnitude smaller than that previously reported. The stress compensation technology emplo...

Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions

By eliminating metal contamination caused by sputtering events occurring behind the wafer as well as in front of the wafer, the authors have successfully formed ultrashallow, low-reverse-bias-current n{sup +}p junctions by post implantation annealing conducted at a temperature as low as 450 C. Further, they propose that the increased leakage current still present in the absence of metallic contamination is due to the residual damage which is the ion-implantation generated point defects widely distributed in the bulk of silicon. Effects of each point defect becomes more pronounced as the annealing temperature is reduced.

Formation of giant-grain copper interconnects by a low-energy ion bombardment process for high-speed ULSIs

Abstract When Cu films are grown on SiO 2 by a low-energy ion bombardment process under a sufficient energy deposition, the film exhibits almost perfect crystal orientation conversion from Cu(111) to Cu(200) upon post-metallization thermal annealing, which is accompanied by the growth of giant grains as large as several hundred micrometers. The room-temperature resistivity of such giant-grain Cu films is 1.76 μΩ cm, which is almost the same as the bulk value (1.72 μΩ cm). The giant-grain Cu interconnects exhibit an electromigration resistance three orders of magnitude larger than Al-alloy interconnects, when the life-test data are extrapolated to room temperature. We have shown that the employment of a non-oxidizing ambient, such as N 2 ambient, is essential for electromigration life-test of Cu interconnects, because Cu is easily oxidized in air. We have investigated the properties of Ta thin films as a diffusion barrier between Cu films and Si substrates using p-n junction diodes. It is shown that a 10 nm thick Ta film works as a effective barrier for temperatures up to 500 °C.

Excellent electro/stress-migration-resistance surface-silicide passivated giant-grain Cu-Mg alloy interconnect technology for giga scale integration (GSI)

Completely (100)-oriented Cu-Mg films having giant grains (typical grain sizes of /spl sim/100 /spl mu/m) were obtained by depositing Cu-Mg films on SiO/sub 2/ followed by thermal annealing at 450/spl deg/C. The Cu-Mg film exhibits a room temperature resistivity of 1.81 /spl mu//spl Omega//spl middot/cm. And this interconnect exhibits 3 times larger migration resistance than the giant-grain Cu interconnect. Furthermore, by employing the self-aligned surface-silicide passivation to the Cu-Mg interconnect, the migration resistance is greatly enhanced. It exhibits two orders of magnitude larger migration resistance than non-passivated giant-grain Cu interconnect at a room temperature.

Large-electromigration-resistance copper interconnect technology for sub-half-micron ULSI's

A large-electromigration-resistance copper interconnect technology has been developed using the low-kinetic energy particle process. It was found that grains as large as 100 mu m grow in the copper film formed on SiO/sub 2/ upon the thermal annealing performed after the film growth process. The resistivity of the copper film is as low as 1.78 mu Omega cm at room temperature, which is almost identical to the bulk resistivity. The electromigration lifetime of the copper interconnect is three to five orders of magnitude larger than that of Al-Si-based alloy interconnects. Furthermore, a novel accelerated-electromigration-testing method has been developed to evaluate such long-lifetime copper interconnects within a short period of test time. The method has made it possible to perform comparative studies of various interconnect materials in a very efficient way to establish large-electromigration-resistance interconnection technology.<<ETX>>

Evaluation of electromigration and stressmigration reliabilities of copper interconnects by a simple pulsed-current stressing technique

By using a simple pulsed-current stressing technique, we have demonstrated that both electromigration and stressmigration resistance of giant-grain Cu interconnects can be evaluated separately in a very efficient manner. From the results of such lifetests, it was found that the reliability of the the Cu interconnect is primarily determined by the stressmigration rather than by the electromigration.<<ETX>>