Takashi Aigo

Growth of large high-quality SiC single crystals

Abstract The availability of large high-quality silicon carbide (SiC) single crystals is a key issue in the development of the full potential of SiC-based device technology. In this paper, recent achievements in bulk crystal growth of SiC are reviewed. We present results on the physical vapor transport growth of SiC bulk single crystals by highlighting the crystal diameter enlargement and the quality improvement of SiC crystals. The causes and formation mechanisms of crystallographic defects, such as micropipes and low-angle grain boundaries, in SiC crystals are discussed. The results of the growth perpendicular to the c -axis are also reported, where stacking faults are defects of major concern. We present an atomistic surface model for the stacking fault generation and discuss a possible way to circumvent this problem.

Growth of Crack-Free 100mm-Diameter 4H-SiC Crystals with Low Micropipe Densities

The theromoelastic stress in post-growth SiC crystals has been investigated in order to suppress the cracks which were frequently observed in SiC crystals with larger diameters. Optimizing the temperature distribution in growing crystals lead to reduction of tensile stress components, and thus resulting in crack-free 100mm diameter SiC crystals with micropipe (MP) densities of 0.025/cm2. The concept of process optimization we established is confirmed to be effective to the growth of large diameter SiC crystals with mechanical stability.

Development of Lapping and Polishing Technologies of 4H-SiC Wafers for Power Device Applications

The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

Analysis of Basal Plane Bending and Basal Plane Dislocations in 4H-SiC Single Crystals

4H-SiC single crystals were grown by the physical vapor transport (PVT) growth method under different thermoelastic stress conditions, and the degree of basal plane bending in the crystals was characterized by the peak shift measurement of X-ray rocking curves. The results indicate that the degree of basal plane bending largely depends on the magnitude of the thermoelastic stresses imposed on the crystals during PVT growth. Quantitative analysis of basal plane bending revealed that the density of basal plane dislocations (BPDs) estimated from basal plane bending is much smaller than that obtained from defect-selective etching. It was also found that the BPD density is correlated with the threading screw dislocation (TSD) density in PVT-grown SiC crystals. These aspects of BPDs were discussed in terms of the BPD multiplication process triggered by the intersection of BPDs with a forest of TSDs extending along the c-axis.

Nitrogen Incorporation Mechanism and Dependence of Site-Competition Epitaxy on the Total Gas Flow Rate for 6H-SiC Epitaxial Layers Grown by Chemical Vapor Deposition

The doping mechanism of nitrogen and the dependence of site-competition epitaxy on the flow rate of H2 carrier gas were studied for 6H-SiC epitaxial layers grown by chemical vapor deposition. The indication was that nitrogen, decomposed into a mono-atomic form (N) in the gas phase, participated in the doping process. The nitrogen decomposition and the reaction at SiC surfaces played an important role in the doping. Site-competition epitaxy for (0001)Si faces was not observed for the high flow rate of the H2 carrier gas because the nitrogen decomposition and the incorporation of the decomposed nitrogen into the epitaxial layers were suppressed by the high gas flow rate. As for (0001)C faces, neither site-competition epitaxy nor its dependence on the flow rate of the H2 carrier gas was observed. Based on the result on site-competition epitaxy, the high flow rate of the H2 carrier gas was applied to epitaxial growth on (0001)C faces in order to reduce the residual donor concentration and that as low as 1.5×1015 cm-3 was obtained for nondoped layers.

Thermal Resistance and Electronic Characteristics for High Electron Mobility Transistors Grown on Si and GaAs Substrates by Metal-Organic Chemical Vapor Deposition

We report dc and microwave characteristics of 0.8 µm gate length GaAs/AlGaAs high electron mobility transistors (HEMTs) grown on Si substrates by metal-organic chemical vapor deposition (MOCVD) and demonstrate direct evaluation of thermal resistance for these HEMTs on Si for the first time. A maximum transconductance of 330 mS/mm is obtained, which is almost the same as that for HEMT/GaAs fabricated simultaneously. From microwave S-parameter measurements, a current gain cutoff frequency (fT) of 9.8 GHz is obtained for the HEMTs on Si, which is about 20% lower than that for HEMT/GaAs, because of the larger parasitic capacitances for HEMT/Si mainly caused by the device-process-related factors. Thermal resistance evaluation of these HEMTs utilizing the gate Schottky junction has revealed that thermal resistance for HEMT/Si is twice as small as that for HEMT/GaAs, namely 36±5 deg/W and 57±5 deg/W, respectively. From these results, it is shown that GaAs on Si is applicable to high-speed devices and very effective in improving the performances of CaAs ICs which are fairly influenced by the power dissipation.

Behavior of Basal Plane Dislocations in Hexagonal Silicon Carbide Single Crystals Grown by Physical Vapor Transport

The behavior of basal plane dislocations in hexagonal silicon carbide (SiC) single crystals grown by physical vapor transport (PVT) was investigated by defect selective etching and transmission electron microscopy (TEM). Oval-shaped etch pits on the etched vicinal (0001)Si surface due to basal plane dislocations were densely distributed around hollow-core threading screw dislocations (micropipes) and formed etch pit arrays perpendicular to the off-cut direction, indicative of the multiplication of basal plane dislocations around micropipes during crystal growth or post-growth cooling. Arrays of oval-shaped etch pits were also observed in the vicinity of small hexagonal etch pit rows due to threading edge dislocation walls, i.e., low angle grain boundaries (LAGBs). They were asymmetrically distributed across LAGBs, and TEM revealed that threading edge dislocations constituting LAGBs trapped basal plane glide dislocations. The interaction between basal plane dislocations and threading screw and edge dislocations extending along the c-axis in SiC crystals was modeled, and the characteristic behavior of basal plane dislocations in hexagonal SiC single crystals was discussed.

Threshold voltage uniformity and characterization of microwave performance for GaAs/AlGaAs high electron-mobility transistors grown on Si substrates

We report on DC and microwave characteristics for high electron-mobility transistors (HEMTs) grown on Si substrates by metal-organic chemical vapor deposition (MOCVD). Threshold voltage (V/sub th/) distribution in a 3-in wafer shows standard deviation of V/sub th/ (/spl sigma/V/sub th/) of 36 mV with V/sub th/ of -2.41 V for depletion mode HEMTs/Si and /spl sigma/V/sub th/ of 31 mV with V/sub th/ of 0.01 V for enhancement mode, respectively. The evaluation of V/sub th/ in a 1.95/spl times/1.9 mm/sup 2/ area shows high uniformity for as-grown HEMTs/Si with /spl sigma/V/sub th/ of 9 mV for V/sub th/ of -0.10 V, which is comparable to that for HEMTs/GaAs. Comparing the V/sub th/ distribution pattern in the area with that for annealed HEMTs/Si, it is indicated that the high uniformity of V/sub th/ is obtained irrelevant of a number of the dislocations existing in the GaAs/Si. From microwave characteristic evaluation for HEMTs with a middle-(10/spl sim/50 /spl Omega//spl middot/cm) and a high-(2000/spl sim/6000 /spl Omega//spl middot/cm) resistivity Si substrate using a new equivalent circuit model, it is demonstrated that HEMTs/Si have the disadvantage for parasitic capacitances and resistances originated not from the substrate resistivity but from a conductive layer at the Si-GaAs interface. The parasitic parameters, especially the capacitances, can be overcome by the reduction of electrode areas for bonding pads and by the insertion of a dielectric layer under the electrode, which bring high cut-off frequency (f/sub T/) and maximum frequency of operation (f/sub max/) of 24 GHz for a gate length of 0.8 (/spl mu/m). These results indicate that HEMTs/Si are sufficiently applicable for ICs and discrete devices and have a potential to be substituted for HEMTs/GaAs.

HIGH UNIFORMITY OF THRESHOLD VOLTAGE FOR GAAS/ALGAAS HIGH ELECTRON MOBILITY TRANSISTORS GROWN ON A SI SUBSTRATE

We report on a study of microscopic distribution of threshold voltage ( Vth) for GaAs/AlGaAs high electron mobility transistors (HEMTs) on a Si substrate grown by metal‐organic chemical vapor deposition (MOCVD). Using selective dry etching, the superior microscopic distribution of Vth comparable to that for GaAs substrates is obtained, namely the standard deviation of threshold voltage (σ Vth) of 8.96 mV with the Vth of −101.3 mV for 150 points of the HEMT in a 1.95×1.9‐mm2 area. From the evaluation of macroscopic (full wafer) and microscopic Vth distribution, high‐density dislocations in the GaAs/Si are found not to affect the uniformity of Vth. This result indicates that HEMT/Si technology has a potential to lead the GaAs/Si to GaAs integrated circuit applications in which large‐diameter wafers are beneficial.

Formation of Epitaxial Defects by Threading Screw Dislocations with a Morphological Feature at the Surface of 4º Off-Axis 4H-SiC Substrates

In this paper, we present the formation of extended epitaxial defects, such as carrot defects, from threading screw dislocations (TSDs) with a morphological feature at the surface of the substrates. It was confirmed using highly sensitive surface observation, atomic force microscopy (AFM) and KOH etching that the surface roughness around a TSD was observed as the morphological feature and TSDs with such a morphological feature formed extended epitaxial defects with high frequency of appearance compared to usual TSDs without any features. The density of TSDs with such morphological feature depended on the polishing methods. Furthermore, we observed that the formation and shapes of extended defects from TSDs with such morphological feature were affected by step-bunching at the surface of the epilayers.