Takashi Egawa

On the Effects of Gate-Recess Etching in Current-Collapse of Different Cap Layers Grown AlGaN/GaN High-Electron-Mobility Transistors

Influences of gate-recess etching with BCl3 plasma in drain current (ID) collapse were performed on different cap layers (i-GaN, n-GaN, and p-GaN) grown AlGaN/GaN high-electron-mobility transistors (HEMTs). Due to the decrease of dynamic-source-resistance by gate-recess, the increase of maximum drain current density and maximum extrinsic transconductance were observed in all cap layers grown AlGaN/GaN HEMTs. After gate-recess etching, about 14 and 17% of decrease in ID collapse were observed on n-GaN and p-GaN cap layers HEMTs, respectively when compared to non-recessed HEMTs. However, increase (~47%) of ID collapse was observed in i-GaN cap layer HEMTs. The decrease of ID collapse in doped GaN cap layer HEMTs is possibly due to the compensation of dopant related traps with plasma induced traps. The increase of ID collapse in i-GaN cap layer HEMTs may be due to the incorporation of damage related traps by gate-recess etching. The decrease and increase of trapping effects were qualitatively confirmed by white-light illuminated IDS–VDS characteristics. An increase of gate leakage current in all recessed gate AlGaN/GaN HEMTs are due to the BCl3 plasma induced damage.