Takeya Hashiguchi

1.25 Gbps wireless Gigabit ethernet link at 60 GHz-band

A 1.25 Gbps 60 GHz-band full duplex wireless Gigabit Ethernet link has been developed. Direct ASK modulation and demodulation scheme is adopted for the 60 GHz-band transceiver. CPW MMICs and planar filters are flip-chip mounted in TX and RX LTCC MCMs. The wireless Gigabit Ethernet link has the function of converting an optical fiber link to a wireless link seamlessly combining a 60 GHz-band transceiver with a 1000Base-SX optical in/out module. The size is 159/spl times/97/spl times/44 mm/sup 3/.

A 60 GHz-band planar dielectric waveguide filter for flip-chip modules

A planar dielectric waveguide filter with CPW I/O ports suitable for flip-chip bonding is proposed and demonstrated for 60 GHz-band applications. The filter is formed incorporating via holes in an alumina substrate. In order to improve a stop-band rejection, short-circuited CPW resonators with half wavelength are added to waveguide-to-CPW transitions. A fabricated 4-resonator filter exhibits an insertion loss of 2.8 dB with a 3 dB-bandwidth of 3.0 GHz and a rejection of 35 dB at a 3 GHz-lower-separation from a center frequency of 58.5 GHz. The filter is successfully mounted in a multi-layer ceramic package using flip-chip bonding.

A 60-GHz-band planar dielectric waveguide filter for flip-chip modules

A planar dielectric waveguide filter with CPW I/O ports suitable for flip-chip bonding is proposed and demonstrated for 60 GHz-band applications. The filter is formed incorporating via holes in an alumina substrate. In order to improve a stop-band rejection, short-circuited CPW resonators with half wavelength are added to waveguide-to-CPW transitions. A fabricated 4-resonator filter exhibits an insertion loss of 2.8 dB with a 3 dB-bandwidth of 3.0 GHz and a rejection of 35 dB at a 3 GHz-lower-separation from a center frequency of 58.5 GHz. The filter is successfully mounted in a multi-layer ceramic package using flip-chip bonding.

60GHz-Band Flip-Chip MMIC Modules for IEEE1394 Wireless Adapters

60GHz-band 500-Mpbs transmitter and receiver multi-chip modules (MCMs) are presented, in which MMICs and a filter are mounted using flip-chip bonding technique. A multi-layer Low Temperature Co-fired Ceramic (LTCC) substrate is adopted for a package. The MCMs are directly bonded with printed wiring boards using ball grid array technique, achieving connections for signals and biasing. A developed 500-Mbps ASK transceiver exhibits an average output power of 10dBm and a minimum received power of ¿55dBm. The transceiver is applied to the IEEE1394 wireless adapter which demonstrates 17-m communication distance in line of sight.

60-GHz-band dielectric waveguide filters with cross-coupling for flip-chip modules

Small-size planar dielectric waveguide filters are presented for 60-GHz-band flip-chip modules. The filters have cross-coupling to introduce an attenuation pole for higher stop-band rejection. We develop two types of three-resonator filters: one has a medium bandwidth and the other has a narrow bandwidth. The former filter shows 1.1-dB insertion loss at a center frequency of 58.3 GHz and 33-dB suppression at a 3-GHz-higher separation. The latter filter shows 3.1-dB insertion loss at a center frequency of 58.4 GHz and a 10-dB-bandwidth of 2.7 GHz. The size of each filter Is 3.4 mm/spl times/3.5 mm.

A 30 GHz-band oscillator coupled with a dielectric resonator using flip-chip bonding technique

This paper presents a 30 GHz-band oscillator with a temperature stable dielectric resonator (DR). The DR is formed incorporating metalized through holes in a dielectric substrate. An oscillator MMIC is stacked on the DR using flip-chip bonding. A fabricated dielectric resonator oscillator (DRO) shows an output power of larger than +10 dBm and a phase noise of less than -90 dBc/Hz at 1 MHz-offset with an oscillation frequency of around 31.7 GHz. The frequency change is /spl plusmn/315 ppm over a temperature range from -25 to +100 /spl deg/C. The size of the DRO is 4.3 mm /spl times/ 3.8 mm /spl times/ 0.4 mm.

Embedded Active Packaging Technology for High-Pin-Count LSI With Cu Plate

We have developed a thin, reliable, low-thermal-resistance LSI packaging technology by embedding a high-pin-count LSI chip into thin build-up layers supported by Cu plate. The embedded LSI chip is a microprocessor with approximately 1500 pads and a thickness of 50 μm, and it is completely laminated by the first build-up epoxy resin. The total package thickness is only 0.71 mm including a 0.5-mm-thick Cu plate for cooling, which is much thinner than the conventional flip chip ball grid array (FCBGA) package with a heat sink. Our package shows excellent warpage characteristics of only 34 μm at room temperature for 27 × 27 mm2 in size. It is also possible to reduce the total package thickness to 0.46 mm by etching the Cu plate to half thickness, with keeping the warpage increase up to 117 μm. Low thermal resistance of 10.8°C/W is achieved for the packages with 0.5-mm-thick Cu plate at a wind velocity of 0 m/s, which is almost comparable to that of an FCBGA with a large heat sink. We have successfully demonstrated the functions of our packages using an LSI tester and personal-computer-like system board. They have also passed a 1000-cycle package-level thermal cycle test.