Takeyuki Itabashi

Electroless deposited cobalt-tungsten-boron capping barrier metal on damascene copper interconnection

The metal capping barrier deposited by the electroless cobalt tungsten boron (CoWB) alloy plating method for ultralarge scale integration applications was investigated. The CoWB film was formed directly on copper without a palladium catalyst, using dimethyl amin borane (DMAB) as a reducing agent, and it was deposited selectively on 0.25 μm wide copper interconnects separated with 0.25 μm spacing SiO 2 . The CoWB thin films were effective barriers against copper diffusion even at CoWB thicknesses as low as 50 nm. Compared with the CoWB film, cobalt tungsten phosphorus films deposited directly on copper using DMAB as a deposition initiator was not effective as a copper diffusion barrier. The plating films contained mainly cobalt with a significant amount of tungsten (up to 20 atom %) and a small amount of boron. Additionally, we propose a newly developed alkaline metal free electroless CoWB plating solution using tetramethyl ammonium hydroxide as a pH adjuster.

Electroless deposited CoWB for copper diffusion barrier metal

A metal capping barrier deposited by an electroless CoWB (cobalt tungsten boron) alloy plating method on damascene copper interconnects has been investigated. The metal capping barrier structure is one solution to prevent the decrease of coupling capacity associated with SiN or SiC capping barriers. In this paper, we propose a direct electroless deposition of Co alloy on copper surfaces, using dimethyl amine borane (DMAB) as a reducing agent, without a palladium catalyst.

Trench and via filling profile simulations for copper electroplating process

We have developed a simulation method to calculate filling profile in sub-micron scale trenches and vias using Cu electroplating. The physical properties (diffusivity and surface reaction rate) of additives are directly incorporated in the boundary condition of this method so that the effects of physical properties of the additives on profile of filling can be evaluated. Using this method, we clarified that micro-knobs and overhangs on seed layer are important for creating a void or seam in the Cu film.

Thin film laminated multilayer wiring board for multichip modules

A high density multilayer wiring board was developed, using thin film laminating technology. The fundamental features of the fabrication process are laminating the high heat resistant polymer film with an adhesive layer, forming via holes by plasma etching and filling them up by electroless copper metallization. The heat resistant adhesive layer consists of polyimide as the matrix and bismaleimide as the melting constituent. Heat resistance of more than 10 min. at 330/spl deg/C can be achieved. The via holes of /spl phi/=25 /spl mu/m are formed by a conformal mask method using plasma etching. This paper describes the fundamental technologies for the fabrication process particularly focusing on electroless copper plating.