Takuya Koga

A robust vehicle detecting and tracking system for wet weather conditions using the IMAP-VISION image processing board

We present a robust vehicle detecting and tracking system for highway scenes of both dry and wet weather conditions taken from a forward-looking vehicle mounted camera. The system comprises the potential vehicle search, vehicle validation, and vehicle tracking processes. In order to overcome reduced visibility conditions, image normalization is performed automatically according to input image contrast and a weak edge grouping technique is used for preventing mass detections during the potential vehicle search process. The system runs at a rate of 15 frames/sec using a PC with the IMAP-VISION realtime image processing board. Results of experiments on image sequences of various highway scenes are presented.

A low-cost mixed-mode parallel processor architecture for embedded systems

A scalable SIMD/MIMD mixed-mode parallel processor architecture called XC core is proposed to meet the high and diverse performance requirements of embedded multimedia applications. XC core supports both the SIMD and MIMD computing models at low hardware cost by dynamically reconfiguring itself into datapath circuits or control circuits, i.e., trading off between performance and flexibility. A control processor is used to broadcast instructions to a whole SIMD PE (Processing Element) array or to a part of it while assigning a separate program to each PU (Processing Unit), that is mainly composed of the hardware resources of several PEs. RTL synthesis results show that area overhead for reconfiguration is merely 10% of the total area. Benchmark results show that the SIMD mode is effectively achieving high performance towards the regular and massive data parallelism portions of applications, while the MIMD mode enables acceleration of the remaining part of applications whose implementation using a pure highly parallel SIMD architecture would otherwise be impossible. The results show that the XC core design is competitive against more complex processors, with respect to both its cost efficiency as a highly parallel SIMD processor and its flexibility as a multicore MIMD processor, against a wide range of applications.

IMAP-CE: a 51.2 GOPS video rate image processor with 128 VLIW processing elements

IMAP-CE is the fourth generation of a series of SIMD linear processor arrays based on the IMAP (integrated memory array processor) architecture. The aim of IMAP-CE is to provide a compact, cost effective and yet high performance solution for various embedded real-time vision applications, especially for vision based driving assistance applications in the ITS (intelligent transportation system) fields. IMAP-CE integrates 128 VLIW processing elements, and a RISC control processor which provides the single instruction stream for the processor array. The peak performance of IMAP-CE is up to 51.2 GOPS operating under 100 MHz. This paper describes the design features of IMAP-CE, its enhanced instruction set for image processing, and the estimated performance.

A 100 GOPS in-vehicle vision processor for pre-crash safety systems based on a ring connected 128 4-Way VLIW processing elements

A 100GOPS vision processor LSI (IMAPCAR) for in-vehicle image recognition which consumes less than 2 watts of power has been developed. 128 of 4-way VLIW with MAC (multiply add accumulation) processor elements (PE) to which data are assigned efficiently by DMA companion scaling capability, has achieved high performance in low cost. Compared with a previous design, performance for major vision tasks has been improved by a factor of 2.5 while 50% of power is reduced.

A programmable parallel processor LSI for video-based driver assistance systems

This paper describes a fully programmable parallel processor LSI which integrates 128 SIMD RISC microprocessors, each operates in 100 MHz. The LSI achieves simultaneous and real-time multiple processing of driver assistance video recognition applications in software, while at the same time satisfies power efficiency requirement of an in-vehicle LSI. Based on four basic parallel methods and a software development environment including an optimizing compiler of an extended C language and video-based GUI tools, efficient development of real-time video recognition applications which effectively utilize the 128 micro-processors are facilitated. Result of a benchmark test using a high level language written for a robust lane-mark and vehicle detection application shows that the LSI can provide a four times better performance compared with a 2.4 GHz general purpose processor.

IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems

Presents a collection of slides covering the following topics: IMAPCAR2 processor core design; SIMD; and MIMD.