Tatsuhiko Fujihira

Experimental and Numerical Studies on

Experimental results on the high-voltage level shifter and dV/dt robustness of 1200 V high voltage integrated circuits (HVICs) using a self-isolation (SI) structure are reported for the first time. Generally, because high dV/dt stress is applied to HVICs during insulated gate bipolar transistor (IGBT) switching, significant displacement current flows through a high-voltage isolation capacitance. This current acts as the base current of parasitic pnp and npn transistors, and causes a potential drop in their base region. In the worst case, this parasitic operation causes device destruction. In this study, not only the normal operation of HVICs but suppression of the parasitic transistors under high dV/dt condition are experimentally demonstrated by considering a high-side layout design and back diverter electrode.

dV/dt

In this paper, we report an area-effective 600 V p-channel level shifter using a self-isolation structure without the degradation of blocking capability for the first time. To prevent the degradation of high-voltage isolation performance, the charge in a double reduced surface electric field (RESURF) structure is controlled at the border region between a high-voltage p-channel metal oxide semiconductor field effect transistor (MOSFET) and a high-voltage isolation region. Because of a divided p-offset region in the drift region of the high-voltage p-channel MOSFET and the high-voltage isolation region, parasitic current to the ground (GND) terminal through the isolation region can be ignored. By using the new high-voltage p-channel level shifter, a 400 V level shift operation is confirmed.

Robustness of 1200 V High-Voltage Integrated Circuits Using Self-Isolation Structure

In this paper, we report on the robustness of self-isolation high-voltage integrated circuits (HVICs) against a voltage surge during a conductivity modulation delay in a free-wheeling diode (FWD) for the first time. Two types of voltage surge that have a negative voltage against the ground potential are applied to HVICs simultaneously in the conventional switching mode. The voltage surge activates parasitic bipolar transistors that may destroy the HVICs. In this study, the operation of parasitic bipolar transistors induced by the surge and the suppression of the action of these transistors were investigated, and the robustness of the self-isolation 1200 V HVICs against surge was verified experimentally.