Te-Chih Chen

Behaviors of InGaZnO thin film transistor under illuminated positive gate-bias stress

In this letter, we investigate the impact of the light illumination on the stability of indium–gallium– zinc oxide thin film transistors under positive gate-bias stress. The noticeable decrease in threshold voltage Vt shift more than 5.5 V under illuminated positive gate-bias stress indicates a superior reliability in contrast with the dark stress. The accelerated Vt recovery characteristic compared with dark recovery demonstrates that the charge detrapping effect was enhanced under illumination. Furthermore, the average effective energy barrier of charge trapping and detrapping was derived to verify that illumination can excite the trapped charges and accelerate the charge detrapping process.

Investigating the degradation behavior caused by charge trapping effect under DC and AC gate-bias stress for InGaZnO thin film transistor

This letter investigates the degradation mechanism of amorphous indium-gallium-zinc oxide thin-film transistors under gate-bias stress. The larger Vt shift under positive AC gate-bias stress when compared to DC operation indicates that an extra electron trapping mechanism occurs during rising/falling time during the AC pulse period. In contrast, the degradation behavior under illuminated negative gate-bias stress exhibits the opposite degradation tendency. Since electron and hole trapping are the dominant degradation mechanisms under positive and illuminated negative gate-bias stress, respectively, the different degradation tendencies under AC/DC operation can be attributed to the different trapping efficiency of electrons and holes.

Light-induced instability of an InGaZnO thin film transistor with and without SiOx passivation layer formed by plasma-enhanced-chemical-vapor-deposition

This paper investigates the illuminated behaviors of InGaZnO thin film transistors with and without a SiOx passivation. For the passivated device, more interface states were generated during SiOx passivation layer deposition by plasma-enhanced-chemical-vapor-deposition. The enhanced trap-assisted photoexcited hole generation induces source side barrier lowering and causes an apparent subthreshold stretch-out phenomenon. However, for the unpassivated device, the fact that the threshold voltage shift in ambient oxygen is lower than in vacuum under light illumination suggests oxygen desorption and readsorption occurs simultaneously, which is consistent with the accelerated recovery rate in oxygen ambiance.

Investigating the Drain-Bias-Induced Degradation Behavior Under Light Illumination for InGaZnO Thin-Film Transistors

This letter investigates the effect of gate/drain bias stress in InGaZnO thin-film transistors under light illumination and in a darkened environment. Drain current-gate voltage (ID-VG) as well as capacitance-voltage (C-V) transfer curves are measured to analyze the degradation behavior. The device characteristic exhibits a positively parallel shift after the gate/drain bias stress in the dark. On the other hand, the identical stress performed under light illumination leads to not only a negative shift but also a distortion of the C-V curve in the off state. Such phenomenon can be attributed to hole-trapping-induced barrier lowering near the drain side after illuminated bias stress.

Self-Heating-Effect-Induced Degradation Behaviors in a-InGaZnO Thin-Film Transistors

This letter investigates degradation behaviors induced by the self-heating effect for amorphous indium-gallium-zinc-oxide (IGZO) (a-IGZO) thin-film transistors (TFTs). Both the surrounding oxide and other thermal insulating material and the low thermal conductivity of the IGZO layer itself cause the self-heating effect in a-IGZO TFTs. The heated channel layer enhances threshold voltage shift, and the evolution of threshold voltage shift is found to be dominated by charge-trapping effect. Further verifications indicate that the degree of threshold voltage shift is dependent on stress power only, and a wider channel leads to more severe self-heating effect.

NBTI Degradation in LTPS TFTs Under Mechanical Tensile Strain

This letter investigates the negative-bias temperature instability (NBTI) degradation of p-channel low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs) under mechanical tensile stress. Experimental results reveal that the interface state density Nit and grain boundary trap density Ntrap of tensile-strained LTPS TFTs are more pronounced than those of unstrained LTPS TFTs. Extracted density of states and conduction activation energy Ea both show increases due to the strained Si-Si bonds, which implies that strained Si-Si bonds are able to react with dissociated H during NBTI stress. Therefore, NBTI degradation is more significant after tensile strain than in an unstrained condition.

Self-heating enhanced charge trapping effect for InGaZnO thin film transistor

This paper investigates the degradation mechanism under self-heating stress for InGaZnO thin film transistor. The apparent positive threshold voltage (Vt) shift and on-current degradation indicate that the combination of trap states generation and electron trapping effect occur during stress. Furthermore, the asymmetric degradation behavior in the Id-Vg saturation measurement demonstrates that the trap states location is near the source side since the relative vertical electrical field is higher than drain side. Moreover, the Joule heating generated by self-heating operation can enhance electron trapping effect and cause larger Vt shift in comparison with the gate-bias stress.

Origin of self-heating effect induced asymmetrical degradation behavior in InGaZnO thin-film transistors

This letter investigates asymmetrical degradation behavior induced by the self-heating effect in InGaZnO thin-film transistors. Both the surrounding oxide and other thermal insulating material, as well as the low thermal conductivity of the InGaZnO layer itself, cause the self-heating effect in InGaZnO thin-film transistors. The heated channel layer enhances threshold voltage shift, and the evolution of threshold voltage shift is found to be dominated by charge-trapping effect. Moreover, a non-uniform distribution of channel carrier concentration leads to an uneven temperature distribution through the InGaZnO active layer and results in the asymmetrical degradation behavior after self-heating operation.

High temperature-induced abnormal suppression of sub-threshold swing and on-current degradations under hot-carrier stress in a-InGaZnO thin film transistors

This letter investigates the effect of temperature on hot-carrier stress-induced degradation behavior in InGaZnO thin film transistors. After hot-carrier stress at 25 °C, serious on-current and subthreshold swing degradations are observed due to trap state generation near the drain side. For identical stress performed at elevated temperatures, current degradation in the I-V transfer curve under reverse mode is gradually suppressed and the anomalous hump in the gate-to-drain capacitance-voltage curve becomes more severe. These suppressed degradations and the more severe hump can be both attributed to hole-trapping near the drain side due to high drain bias at high temperature.

Application of in-cell touch sensor using photo-leakage current in dual gate a-InGaZnO thin-film transistors

In-cell touch sensor that can be integrated with display pixel circuit using dual gate InGaZnO thin-film transistor is proposed. Under bottom gate operation, device characteristics are not sensitive to light illumination. On the contrary, light can lead to evident subthreshold leakage when operated with top gate. This behavior allows touch sensor to be realized by sensing the ambient light using top gate operation, without affecting normal bottom gate operated devices in display pixel. Further, the proposed operation method of touch sensor needs no additional fabrication and cost, and even black matrix is not required either.