Tero Koivisto

UWB transceiver circuits design for WPANs applications

The advantages of ultra wideband (UWB) communication are its possibility of achieving high throughput, low power, low cost and position location capability. In this paper, an impulse-based UWB transceiver using low band of UWB spectrum from 3.1 to 5GHz is designed for wireless personal area networks (WPANs) applications. The transceiver includes Gaussian pulse generator, ultra wideband low noise amplifier (LNA), multiplier, integrator and timing circuits, which use 0.18/spl mu/m, 1.8V CMOS technology. The wideband LNA has a power gain of 10dB and minimum noise figure of 2.7dB. Its return loss is better man 12dR For the UWB transceiver, the power consumption of transmitter is lower than 1mW while the receiver is about 23mW.

UWB Radio Module Design for Wireless Intelligent Systems-From Specification to Implementation

In this paper, we designed an impulse-based ultra wideband (UWB) radio module (low band) for wireless intelligent system applications such as radio frequency identification (RFID) and wireless sensor networks (WSN). The UWB radio module includes transceiver block, baseband process unit and power management block. The transceiver circuits include Gaussian pulse generator, wideband low noise amplifier (LNA), multiplier, integrator and timing circuits, which use 0.18mum, 1P6M CMOS technology. The wideband LNA has a power gain of 10dB and minimum noise figure of 2.7dB. For UWB transceiver, the power consumption of transmitter is lower than 1mW while the receiver is about 23mW. The liquid-crystal-polymer (LCP)-based system-on-package (SoP) technology is used to implement the UWB radio module for low power, low cost and small size

Statistical performance of IIP2 in active and passive mixers

In this work, we study two down conversion mixers, a passive ring mixer and an active Gilbert mixer from the point of view of even order distortion. First, the effect of mismatch on the IIP2 mean value and deviation of the mixer is studied by Monte Carlo simulations. The simulated results are compared to demands of the WCDMA standard, and the need for second order distortion compensation techniques is discussed. After this, we study how phase and amplitude errors of LO-signals affect the IM2 distortion of the mixer. The simulation results show that without an extra IIP2 compensation technique the mixers cannot meet the linearity requirements demanded by the system.

Feedback network for cascaded ultra-wideband amplifiers

This paper relates to a feedback network for cascade amplifiers, which uses an active stage to feed signal back to a first internal node at the output of the first amplifier stage of the cascade, and an optional feedback path through a resistor. The proposed simple connection is shown to improve amplifier stability and to increase isolation, with no discernible extra cost. First measurement results of an UWB LNA prototype circuit fabricated in a 130-nm digital CMOS process will be given to support stated benefits.

Mixed-signal Viterbi decoder for a MB-OFDM receiver

This paper presents a mixed-signal Viterbi decoder, which is suitable for a MB-OFDM UWB receiver. The decoder structure is based on a (2,1,7) convolutional code used in several UWB physical layer proposals. An analog processing core can be viewed as an alternative approach to the digital cores, which need advanced signal processing techniques to avoid the speed bottlenecks, e.g. in add-compare-select operation. By using a distributed trellis diagram and differential state metric update, the large path memory can be excluded from the decoder implementation. The accuracy of the proposed decoder is increased by combining the branch metric calculation with the 3-bit digital-to-analog converter at the decoder front-end.

A dual feedback loop low-noise amplifier

This paper studies application of a semi-active dual loop feedback network in an ultrawideband low-noise amplifier which has been realized in a 130-nm bulk digital CMOS process. The proposed simple feedback connection is shown to improve amplifier stability and to increase isolation, with no discernible extra cost. Measurement results support the stated benefits with stable amplifier operation in all measurement points.

Ultra-wideband CMOS-MEMS radio

Current ultrawideband (UWB) radios have several unsolved issues in front-end performance including difficult and expensive clock synthesizer designs, and power hungry baseband functions. In fact, the expected breakthrough of the very useful UWB technology has stalled since realized high bitrate integrated radios are much too expensive in the sense that they dissipate a lot of DC power and that their implementations require large IC areas.

Mixed-signal baseband processing chain for a MB-OFDM receiver

This paper presents a mixed-signal baseband processing chain, which is suitable for a MB-OFDM UWB receiver. The convolutional decoder structure is based on a (2,1,7) convolutional code used in several UWB physical layer proposals. An analog processing core can be viewed as an alternative approach to the digital cores, which need advanced signal processing techniques to avoid the speed bottlenecks, e.g. in add-compare-select operation. By using a distributed trellis diagram and differential state metric update, the large path memory can be excluded from the decoder implementation. The accuracy of the proposed decoder is increased by combining the branch metric calculation with the 3-bit digital-to-analog converter at the decoder front-end.

An analog baseband chain for DS-UWB system

In this paper, we propose a mixed-mode baseband chain using a high-speed analog Viterbi decoder. The circuit system architecture is presented with a link budget calculations and the baseband circuitry is introduced. Our target performance is 125 Mbit/s and 1 GbWs throughput at the distances of 10 and 1 m using a 1 GHz bandwidth dedicated to UWB systems between 3.1-4.9 GHz utilizing the analog Viterbi decoder. Proposed analog receiver architecture makes possible high-speed communication with decreased power consumption.

A 0.18 μm CMOS Ultra-Wideband Low-Noise Amplifier with High IIP3

In this paper an ultra-wideband low-noise amplifier (LNA) for the frequency range of 3.1 - 9.4 GHz using 0.18 mum CMOS RF process is introduced. Single-ended single stage LNA structure utilises an input LC-ladder, cascode transistor configuration and LRC-feedback to realise an ultra broad bandwidth response. In operating frequency range noise figure (NF) of 3.1 dB and gain of 10.6 dB were achieved along with high linearity (IIP3) even up to 10.9 dBm at 3.1 GHz. With the bias network, the LNA had a total power consumption of 31 mW from 1.8 V supply