Ari Paasio

Reducing the feature vector length in local binary pattern based face recognition

In this paper we propose a method for reducing the length of the feature vectors in the local binary pattern (LBP) based face recognition. This is done to speed up the matching of the feature vectors in real-time face recognition and detection systems. We define a new discrimination concept of the uniform local binary patterns called symmetry. Patterns are assigned different levels of symmetry based on the number of ones or zeros they contain. These symmetry levels are rotation invariant allowing a general discrimination methodology. Empirical studies on both human perception and LBP face recognition accuracy using the standard FERET database confirm that the concept of symmetry is an efficient discriminator.

Accelerometer-Based method for extracting respiratory and cardiac gating information for dual gating during nuclear medicine imaging

Both respiratory and cardiac motions reduce the quality and consistency of medical imaging specifically in nuclear medicine imaging. Motion artifacts can be eliminated by gating the image acquisition based on the respiratory phase and cardiac contractions throughout the medical imaging procedure. Electrocardiography (ECG), 3-axis accelerometer, and respiration belt data were processed and analyzed from ten healthy volunteers. Seismocardiography (SCG) is a noninvasive accelerometer-based method that measures accelerations caused by respiration and myocardial movements. This study was conducted to investigate the feasibility of the accelerometer-based method in dual gating technique. The SCG provides accelerometer-derived respiratory (ADR) data and accurate information about quiescent phases within the cardiac cycle. The correct information about the status of ventricles and atria helps us to create an improved estimate for quiescent phases within a cardiac cycle. The correlation of ADR signals with the reference respiration belt was investigated using Pearson correlation. High linear correlation was observed between accelerometer-based measurement and reference measurement methods (ECG and Respiration belt). Above all, due to the simplicity of the proposed method, the technique has high potential to be applied in dual gating in clinical cardiac positron emission tomography (PET) to obtain motion-free images in the future.

Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes

This paper introduces the processing core of a full-custom mixed-signal CMOS chip intended for an active-contour-based technique, the so-called pixel-level snakes (PLS). Among the different parameters to optimize on the top-down design flow our methodology is focused on area. This approach results in a single-instruction-multiple-data chip implemented by a discrete-time cellular neural network with a correspondence between pixel and processing element. This is the first prototype for PLS; an integrated circuit with a 9/spl times/9 resolution manufactured in a 0.25 -/spl mu/m CMOS STMicroelectronics technology process. Awaiting for experimental results, HSPICE simulations prove the validity of the approach introduced here.

Template Design for Cellular Nonlinear Networks With 1-Bit Weights

In this paper, we show how a cellular nonlinear network with 1-bit weight programmability can be used for processing black and white image data. When using such a binary-programmable network, some templates need to be processed algorithmically, in other words, divided into subtasks that are processed consecutively. We classify templates into groups based on their properties and give guidelines as to how the division into subtasks (when applicable) is performed. A large collection of templates suitable for the proposed model is shown. We also describe one possible cell structure that realizes the binary-programmable model. The cell is modeled with Matlab and selected template simulations are shown.

Current source calibration by combination selection of minimum sized devices

In this paper, we present an effective mismatch compensation method for analog current mode processing. Such a method is required in current and future mixed-mode processing systems, which take advantage of analog processing in addition to conventional digital logic. The proposed design utilizes analog processing devices that can be scaled down with the manufacturing process, therefore employing the advantages of CMOS technology in the form of a smaller implementation area. The range of input currents employed is 1 muA to 10 muA. The example circuit can be calibrated within 1 % of the nominal value at the 4sigma confidence interval with 65 mum2 of implementation area in 0.15mum CMOS technology

Dense CMOS implementation of a binary‐programmable cellular neural network

An implementation of a cellular neural/non-linear network (CNN) for processing black-and-white (B/W) images is presented in which the template terms are 1-bit programmable. Such approach leads to a very compact implementation of the coefficient circuits and fast (digital) programming. In this programming scheme, the more complex templates are split into subtasks that are run successively. The structure allows a direct or algorithmic evaluation of the majority of templates proposed for B/W images. The transient mask is utilized in performing the local logic operations as well as in template operations. The proposed architecture is suitable for high-density implementations. A test structure of a 4 × 4 network has been implemented with a standard digital 0.18-µm CMOS process. One cell occupies only 155 µm2, making possible the implementations of very large networks on a single chip. The algorithms used for the logic function computations and selected template evaluations are described, and the corresponding measurement results are shown. Copyright

Template design for binary-programmable cellular nonlinear networks

In this paper we show how a binary-programmable cellular nonlinear network can be used for processing black and white templates. When using a binary-programmable network, some templates need to be divided into subtasks that are processed consecutively. We classify templates into groups based on their properties and give general rules as to how the division into subtasks is performed. We also show a cell structure that realizes the binary-programmable model. The cell is modeled with Matlab and selected template simulations are shown.

Dedicated hardware for parallel extraction of local binary pattern feature vectors

In this paper we propose a dedicated hardware for extraction of local binary pattern (LBP) feature vectors. The LBP method transforms local features of image data into binary micro-patterns that represent local and global features of the image. The LBP method can be used in applications such as texture classification, moving object detection and face detection and recognition. The hardware proposed in this paper has a massively parallel architecture in order to speed up the LBP feature extraction in real-time applications. The image data is pre-processed using an analog comparison method. Therefore, simulations are performed to find out how mismatch affects the performance.

A binary‐based on‐chip CNN solution for pixel‐level snakes

This paper introduces a binary-based on-chip cellular neural network (CNN) solution for pixel-level snakes. Every cell in the array comprises circuitry for B/W and grey-scale processing. The B/W processing is performed with a positive range high-gain discrete-time (DT)CNN model with 1-bit of programmability. The grey-scale processing is executed on a dedicated sub-cell. The design efforts are mainly focused on area consumption and processing speed. The result is a chip with a resolution of 9 × 9 cells in a 0.18 µm CMOS technology process and a density of more than 700cells/mm2. Simulations at schematic level lead to a time of less than 100ns for every DTCNN step. The peak power dissipation is kept at a few watts in a hypothetical chip of 128 × 128 cells. Copyright

Seismocardiography: Toward heart rate variability (HRV) estimation

Heart rate variability (HRV), the variation in the beat-to-beat heart rate, is a key indicator of the cardiovascular condition of an individual. The purpose of this study was to cross-validate the beat-by-beat time variations in seismocardiography (SCG) with electrocardiography (ECG) for determining ultra-short term HRV indices. Twenty healthy young volunteers were examined in this study by performing an ultra-short term data acquisition protocol. Kubios HRV software was utilized to assess the HRV parameters. The HRV indices were analyzed in both time-domain and frequency-domain processes. High linear relationship (r>0.98) and agreement was observed between the HRV indexes calculated from SCG and ECG data. In conclusion, SCG and ECG HRV indices were found to be statistically close enough to warrant the use of SCG for estimating HRV.