Terumi Sawase

A single-chip microcomputer with realtime rewritable nonvolatile data storage

An 8b single-chip microcomputer having two nonvolatile NMOS memories, developed for consumer appliance and small industrial system applications will be described. The chip contains both a 1Kbyte program store and a 60byte realtime rewritable data store.

An Intelligent Subprocessor For Hardware Emulation With 20 MOPS Performance

An intelligent subprocessor (ISP) for hardware emulation of embedded controller subsystems is proposed. The subprocessor achieves 20 MOPS and 50-ns resolution of task switching for 12 tasks. It introduces task switching based on a time-slot assignment mechanism, one-clock-per-instruction (CPI) architecture, and parallel processing of a plurality of operations in a single-instruction execution. It also introduces field-programmable internal EPROMs with self-detecting power saving circuits. This subprocessor can emulate simple hardware functions such as timers and serial interfaces, as well as complex hardware functions such as DC motor controllers. A test chip with 90 K transistors was fabricated on a 4.12-mm*4.98-mm area by using 1.3- mu m CMOS technology. >

A microprocessor with 2Kbytes EEPROM for data security applications

This paper will cover a chip for filing and controlling personal data files. The 5.6×5.7mm IC has been fabricated in 2μm CMOS, and uses ROM self-comparison and EEPROM security check circuits.