Theresa Sze

Optical interconnects: out of the box forever?

Based on a variety of optimization criteria, recent research has suggested that optical interconnects are a viable alternative to electrical interconnects for board-to-board, chip-to-chip, and on-chip applications. However, the design of modern high-performance computing systems must account for a variety of performance scaling factors that are not included in these analyses. We will give an overview of the performance scaling that has driven current computer design, with a focus on architectural design and the effects of these designs on interconnect implementation. We then discuss the potential of optics at each of these interconnect levels, in the context of extant electrical technology.

Optical proximity communication using reflective mirrors

Optical proximity communication (OPxC) with reflecting mirrors is presented. Direct optical links are demonstrated for silicon chips with better than -2.5dB coupling loss, excluding surface losses. OPxC is a true broadband solution with little impairment to the signal integrity for high-speed optical transmission. With wavelength division multiplexing (WDM) enabled OPxC, very high bandwidth density I/O, orders of magnitude higher than the traditional electrical I/O, can be achieved for silicon chips.

Optical interconnections within modern high-performance computing systems

Optical technologies are ubiquitous in telecommunications networks and systems, providing multiple wavelength channels of transport at 2.5-10 Gbps data rates over single fiber-optic cables. Market pressures continue to drive the number of wavelength channels per fiber and the data rate per channel. This trend will continue for many years to come as e-commerce grows and enterprises demand higher and reliable bandwidth over long distances. E-commerce, in turn, is driving the growth curves for single-processor and multiprocessor performance in data-base transaction and Web-based servers. Ironically, the insatiable taste for enterprise network bandwidth, which has driven up the volume and pushed down the price of optical components for telecommunications, is simultaneously stressing computer system bandwith-increasing the need for new interconnection schemes-and providing for the first time commercial opportunities for optical components in computer systems. This paper will center primarily on the use of optical interconnects within commercial digital computing systems, particularly workstations and servers, and will address mainly board-board interconnects within a single cabinet or box. We feel this is the most likely utilization of optics in commercial computer systems for the next decade. We will also provide a practical analysis of inter-and intrachip optical interconnects and the difficulties they face in real systems.

PAM-4 Signaling over VCSELs with 0.13µm CMOS Chip Technology

We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13microm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude. We demonstrate that VCSEL based PAM-4 can match or even improve performance over binary signaling under conditions of a bandwidth limited, 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling. Measured benefits are reconciled with information theory predictions.

Proximity Communication flip-chip package with micron chip-to-chip alignment tolerances

As performance gains from scaling silicon slow, improvements in system performance must come from tighter integration. Proximity Communication (PxC) enables designers to aggregate multiple chips that perform as a single large piece of silicon. PxC enables the heterogeneous integration of an optimized mix of process technology and functionality, such as DRAM, Flash memory, and CMOS processor chips. PxC enables silicon die placed face-to-face to communicate using close-field capacitive coupling. In a 90 nm standard CMOS technology, using the packaging techniques described in this paper, PxC provides chip-to-chip latency of 2.5 ns at 4 Gb/s per channel with less than 2.5 mW/Gb/s, an areal bandwidth density of over 2 Tb/smm2, and a BER less than 10−18[1]. In this paper, we describe one of our packaging prototypes that enables PxC and provides its system-level benefits.

Comparative study of very short distance electrical and optical interconnects based on channel characteristics

This paper presents a comparative study for very short distance (less than 1 meter) electrical and optical interconnects in terms of channel characteristics. We also predict when and where optical interconnect may replace their electrical counterpart.

The chip-multithreading architecture and parallel optical interconnects

Tens of terabits-per-second bandwidth will be required for revolutionary chip-multithreading (CMT) architectures. In this presentation, we will review the technical challenges for electrical signaling and discuss how parallel optical interconnects could be valuable in CMT architectures.

Early experience with in situ chip-to-chip alignment characterization of Proximity Communication flip-chip package

Proximity Communication (PxC) facilitates the integration of VLSI chips in a package using near-field capacitive coupling between chips, eliminating the need for solder or wires for I/O at the chip-to-chip interface. PxC provides chip-to-chip interconnect with bandwidth density and energy per bit similar to on-chip I/O, enabling system on a chip performance within a package. We have built early packages to explore assembly concepts and developed test methods for verification of the PxC design space. This package started with an adhesively-bonded three-chip subassembly of two Island chips and one Bridge chip. The two outer Island chips were reflowed to an alumina ceramic substrate. In the resulting package, communication between chips was achieved using PxC from Island to Bridge and then from the Bridge to the other Island. We demonstrated the ability to detect the X, Y, and Z chip-to-chip relative location and the ability to steer PxC data to optimize signal integrity within the package. This paper describes the first demonstration of active monitoring of chip-to-chip alignment during thermal cycling, in a PxC-enabled package. Leveraging this work, future packages will better exploit PxC benefits such as free-space electrical interconnect and re-workability of multi-chip modules.

PAM-4 signaling over VCSELs using 0.13 μm CMOS

We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13μm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude We demonstrate that VCSEL based PAM -4 can match or even improve performance over binary signaling under conditions of bandwidth limited 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling.

Can optical interconnects be sufficiently parallel to support the needs of computer systems

The level of parallelism required for computer interconnects represents significant opportunities and serious challenges for optical interconnects. In this presentation, we will discuss several challenges and present some potential optical interconnect solutions.