Thorsten Scharf

Laminate Chip Embedding Technology — Impact of Material Choice and Processing for Very Thin Die Packaging

Laminate chip embedding tailored to very thin dies is an attractive package technology for the integration of logic and power dies. In this paper we report on a new leadframe based laminate chip embedding technology. Best benefit from this technology can only be achieved if experience from silicon front-end, assembly and packaging, as well as from printed circuit board research is combined and consequently applied. We demonstrate the importance of close interaction between Si-frontend and assembly and packaging technology on three examples of applied materials and process research: First, we show in a comparative study that glass fiber filled resin systems result in superior package reliability as compared to filled systems without glass fibers. Second, we present a novel approach to avoid lamination voids by process simulation based on the Monte-Carlo method. Third, we describe the mechanism of laser induced chip metallization damages during contact opening. We also present measures on how to avoid these damages. Our results show that careful selection of laminate materials and chip back-end-of-line materials are the key success factors for stable processes and reliability.