Tien-Yu Tom Lee

A Conjugate Numerical-RC Network Prediction of the Transient Thermal Response of a Power Amplifier Module in Handheld Telecommunication

A study compares two different approaches (numerical vs. RC Network) used to predict the transient thermal response of a Radio Frequency (RF) Power Amplifier (PA) module at a given duty cycle (power on and off periodically) in handheld telecommunication. In the numerical approach, commercial software is used to predict device’s transient thermal response at any arbitrary time of interest for a given set of material properties. To predict the peak and valley temperatures of the device when it reaches steady state, a new methodology is presented, combining the steady state temperature at an averaged power and the temperature difference between single-pulse (at averaged power) and a periodical curve at peak or valley. For multiple heat sources, a linear superposition theory applies. Temperature at any given junction and at any specific time, is a linear superposition of its response to the power applied at all junctions (including itself) summed up over all preceding time history. In the analytical Resistor-Capacitor (RC) network approach, the R’s (thermal resistances) and τ’s (time constants) in a single-pulse are predicted using linear regression curve fitting techniques. For a single-pulse RC model, superposition methodology is applied to solve the transient response in any waveform (single or multiple waves in a cycle). A formulated spreadsheet performs the calculation, with inputs such as pulse width, waiting time (before the pulse is initiated), pulse magnitude and period. The peak and valley temperatures at steady state for a single square wave per cycle are predicted through closed form solutions. For multiple square waves per cycle, individual wave responses must be added together throughout the entire range of the steady state cycle to determine the locations (time) of the peaks and valleys. In order to compare these two approaches, two case studies were conducted on a PA module for a cell phone application: at 12.5% duty cycle and at three-square wave per cycle. Results show good agreement between the numerical and RC model approaches, either at any arbitrary time or at “peak and valley” in steady state. Although the RC network method requires an intermediate creation of the RC model from single pulse numerical solutions (or from experimental measurement), the total time and effort to achieve similar results as compared to the direct numerical method may be considerably reduced. Further, once created, the RC model permits essentially unlimited flexibility and extremely rapid computation for arbitrary power cycling, whereas the direct numerical approach requires “starting over” with every different power cycling description of interest.Copyright

Thermal Performance Comparison between Various RF Transceiver Modules

A detailed numerical study was conducted to investigate the thermal behavior of three RF transceiver modules in a custom environment. The system incorporates the transceiver device and the high density interconnects (HDI) substrate at a fixed boundary condition. In general, the transceiver module requires lesser heat dissipation and thermal requirement may not be as critical as for the power amplifier (PA) module. However, its low thermally conductive die attach material, reduced size of the active areas (micron range) and fairly high power densities lead to the concern that the thermal budget (150 degC) may be exceeded under the various operating scenarios. Each transceiver module was modeled in detail including the device local discrete heat sources, the substrate metal layers, and micro and buried vias distribution across the dielectric layers. The impact of via locations in the substrate is also examined to address the die reliability issues. Results indicated that due to the low power dissipation, the predicted peak temperatures of all three Transceiver modules are below the 150 degC thermal budget. Analyses also suggest that the vias located directly under the die could be removed without any significant thermal penalty. Also, by strategically placing a few vias near the heat sources while removing rest of them in the substrate; it will still satisfy the overall thermal requirements. A detailed comparison between various transceiver designs and associated thermal performance is provided

Modeling Strategy in Evaluating Thermal Performance of an RF Module for Wireless Communications

A detailed study was performed to evaluate the thermal performance of RF Modules and to identify meaningful correlations between specific design characteristics and the power dissipation needed to satisfy the required thermal budget under various critical operating conditions. The investigation focuses on the thermal characteristics of the RF module die layout and transistor cells, and on the thermal impact of the metallic air bridges connecting the load cells to the collector pads/vias to the overall thermal performance of the RF module. A first-pass modeling predicts higher temperatures than IR measurement, by ~20–30%. The addition of the die layout air bridges connecting the load cells in the detailed simulation models leads to a predicted air bridge temperature of ~9% higher than the IR measurement. Additional modeling reveals that between the open (not encapsulated) and the closed module, the die peak temperature differs by less than 3 °C, most of the heat being dissipated through the substrate and board to the heat stage. Thus, the impact of mold compound is insignificant. For a closed module, the mold compound helps dissipate the heat, so the die temperature is slightly cooler than for the open module (<<3°C). This suggests that the die peak temperature measured in an open module can be adjusted (by subtracting 2–3°C) to represent the die temperature in a closed module.Copyright

Performance comparisons for electrically conductive epoxies in wireless applications

The thermal conductivity of electrically conductive epoxies is usually the most important factor when considering new epoxy materials for die attach in wireless applications. Some recently developed epoxies with improved mechanical and electrical properties were studied. A combination of numerical modeling, simulation and measured data were used to determine the trends between the thermal, mechanical and electrical performance of various die attach epoxies. The thermal simulation results indicated that the higher (20 W/mK) thermally conductive epoxy provides only a slight improvement (less than 10degC) in thermal performance when considered against the lower (8 W/mK) thermally conductive epoxy. By comparison, the electrical conductivity of the higher thermally conductive epoxy was lower by an order of magnitude than the lower thermally conductive epoxy. Also during the moisture sensitivity level testing (MSL), the higher thermally conductive epoxy exhibited some degree of delamination while the lower thermally conductive epoxy exhibited no delamination. The study revealed that the improved mechanical and electrical properties reduce the reliance on the thermal property as the most important factor in the selection of electrically conductive epoxies

System-Level Thermal Performance Optimization for Electronic Module Incorporating Dual-Channel Power Stage For Digital Amplifier

A detailed numerical study was conducted to model the thermal behavior of a microelectronics module in a custom environment. The system incorporates four 54-lead small outline integrated circuit (SOIC) packages with exposed pads. These packages were coupled to a heat sink at a free convection environment with an external ambient temperature of 25 degC. The system is optimized by choosing the appropriate heat sink for the efficient operation of the device under constant powering, also is used to quantify the thermal impact of each element on the overall thermal performance of the module. The thermal performance for a maximum powering scenario is evaluated, and the peak field-effect transistor (FET) power levels satisfying the thermal budget (150degC) are identified. Several cases were investigated, varying the power levels and the thermal properties of the interfacing pads while maintaining the ambient temperature at 25degC. The peak temperatures for the typical (1.25 W/package) and maximum powering (3.3 W/package) scenarios range from 68degC to 132.5degC, indicating that both designs satisfy the thermal requirements; the corresponding junction-to-ambient thermal resistances (Rja) vary from 8.1degC/W to 8.8degC/W. An additional study evaluates two cases with an improved thermal pad with a thermal conductivity of 20 W/mK, replacing the existing pads, which have a thermal conductivity of 1.1 W/mK. This results in a peak temperature drop by 40degC. The corresponding stack-up thermal resistances were calculated for each layer, and indicate that most of the junction-to-ambient thermal resistance came from the thermal pad and heat sink (HS)-to-ambient thermal resistances. These resistances could be further reduced by applying forced convection to cool the system (thus reducing the heat sink-to-ambient thermal resistance), or by replacing the thermal pads with an improved thermal interface material. The temperature of the heat sink base is fairly uniform, indicating a good lateral heat spreading provided by the heat sink. The thermal interaction between the components is minimal, and could be further reduced when adding a better thermal interface between the package and heat sink

A New Resistor-Capacitor (RC) Transient Thermal Network Approach for Power Amplifier Module in Handheld Telecommunication

When a Power Amplifier (PA) device is operated at a given duty cycle (power on and off periodically), the device temperature responds accordingly with the peak and valley values occurring per cycle. Detailed transient thermal analysis is required to predict the device’s thermal characteristics at specific timeframes or at steady-state. Many thermal evaluations are conducted using the steady state condition at 100% duty cycle (power on continuously), requiring less computational time than the transient analysis, but providing conservative prediction without details of the transient response. Another shortcoming of the numerical prediction is the large amount of computational time and the inability to estimate temperatures for long cycle times. A new thermal Resistor-Capacitor (RC) network approach to predicting transient thermal responses in semiconductor packages is presented in this study. The proposed compact thermal model for a given package is a thermal RC network extracted by curve fitting the temperature response predicted by simulation to a step power input. Non-grounded Foster network is adopted for the proposed RC network, as its special structure makes it simple to change the RC topology during RC network extraction. The procedure to obtain RC values in each RC topology is iterated to get optimal RC values. The RC topology and values yielding minimum RMS error between the thermal RC network and simulation are accepted as the extracted compact thermal model for the given package. The extracted model is then applied to predict the transient temperature of a given power pulse. The thermal RC networks in both model extraction and subsequent prediction are expressed in Laplace domain first, and then inverted to the time domain. This ensures two advantages: (1) curve fitting during model extraction is simplified and accelerated; (2) the extracted model can predict the temperature responses to essentially all power pulses in practice. The proposed approach is validated on a PA module. The results show that the approach works accurately in the case of single heat source in the module. The approach combined with method of superposition can accurately predict temperature responses in the cases of multiple heat sources as well. To address further challenges of self and interactive heating in multiple heat sources, a direct fit method is also proposed. Validation results show that it is an effective alternative to predict transient temperatures of packages in specific situations.Copyright

Thermal Investigation of Interconnect Technologies for GaAs RF Power Amplifier in Handheld Applications

Thermal simulation and infrared characterization are conducted to evaluate and compare the thermal performance of three interconnect options: wire bond, direct die attach, and flip chip interconnect. The test vehicle is a dual band RF PA module with low and high-band GaAs devices. As only one band is operated at a time, the focus is on the low-band GSM GaAs die. For direct die attach interconnect, the wire bond device is reused with all RF in/outs being connected from the backside of the GaAs device through individual vias in the device. The effects of through via design, solder attach material and thickness, and the thermal via layout in the substrate are evaluated. For flip chip interconnect, the original wire bond device was redesigned to accommodate metallic bumps for RF in/out, control and grounding. The ground bumps placed directly above the heat source area provide the main heat transfer path to the substrate. The size of the ground bumps, its material and the thermal vias layout in the substrate are investigated. Infrared thermal characterizations were conducted on both wire bond and direct die attach options to validate the simulations, with good agreement.Copyright

System Level Thermal Optimization of an Automotive Lightning Module Incorporating Several Power Devices

The conjugate thermal performance of microelectronics module incorporating several power packages and additional passive components in a custom environment is evaluated and further optimized using numerical simulation and experimental validation. The automotive industry deals on a daily basis with multiple packaging and module-level thermal issues when reducing the size of components for a lightning system in a car, while managing the routing of very high current. The study provides a better understanding of the strengths and weaknesses of the IC incorporation into a system module level, for both present and future product development. The reference design is evaluated at a system level, and several improvements are identified to enhance the overall thermal performance of the lightning system. The main concern is related to the possibility of exceeding the thermal budget for a large system incorporating several PQFN (Power Quad Flat No-Lead Package) packages with additional heat dissipation devices in an enclosure, at an external ambient temperature of 85°C. Due to the compactness of the device, there are only limited solutions to extract the heat from the high power dissipation system. The impact on the thermal balance of the trace dissipation, the location and size of the pins connecting the two boards (motherboard and daughter board) forming the system, the header heating and other passive components under various powered conditions are evaluated. A revised model includes additional pins (reduced diameter), modified motherboard and harness structures and their locations; the impact of additional heater traces on both top and bottom surfaces of the motherboard, and a modified daughter board design, is also evaluated. The resulting peak temperatures range from 118.3°C to 137.3°C and the corresponding junction-to-ambient thermal resistances (Rja) vary from 8.4°C/W to 8.8°C/W. Rja is defined as the temperature difference between the peak device and ambient divided by the total power dissipation of the PQFN packages. An optimized design is further evaluated, with lowered thermal resistance from the motherboard, the board-to-board pins, the junction box board, and the wiring harness. The thermal budget is satisfied, as the peak temperatures reached by the two designs are below the 150°C limit. Additional experimental results are used to benchmark the simulation results, within 1–6% accuracy.Copyright

Thermal Performance Evaluation and Enhancement for an Automotive Wireless Application Incorporating Multiple Dynamic Heat Sources

A detailed transient thermal study for a Remote Keyless Entry System with dynamic heat sources is performed using numerical simulations. The SmartMOS-type device is packaged in a 54 lead SOIC (small outline IC) package with an exposed copper slug. The package is attached to a 4-layer PCB with thermal vias embedded in the board. The challenge resides in the transient thermal interaction between several dynamic heat sources (channels), activated in a sequential fashion following different powering profiles and patterns. The main purpose of the device is to wirelessly provide a communication path between the remote and the receiver placed in the car, so the distance and the signal strength between the two are paramount for an optimal operation. The signal strength is directly associated with the voltage (and associated powering) levels. Several operating scenarios are evaluated by modifying the system design (thermal via pattern) and varying both power dissipation and duration levels. The study starts with just one channel dissipating power, followed by activating the entire dynamic system comprised of six channels dissipating each powers reaching up to 22W at different time intervals. The transient thermal behavior of each source is analyzed during the process. Results indicate that the system dissipating over 14V exceeds the thermal budget (150C) after only 3 powering cycles. Based on the analysis of the complex temperature fields for the multiple dynamic source system, the authors identify alternative power profiles to improve the thermal performance of the overall wireless system, by splitting the power in selective channels and by modifying the power sequence. Several additional cases are further investigated, and the optimized power profiles indicate that they satisfy the thermal budget under various operating conditions and several multiple cycles, while still maintaining the device voltage at 14V levels. A thorough study of the transient patterns and needed system improvements are included.Copyright

System Level Thermal Performance Evaluation of New Inverted Exposed Pad Packages for Automotive Applications

An extensive 3-D conjugate numerical study is conducted to assess the thermal performance of the novel 54 lead SOIC (with inverted exposed Cu pad) packages for automotive applications. The thermal performance of the modified designs with exposed pad are investigated, ranging from smaller die/flag size to larger ones, with single or multiple heat sources operating under various powering conditions. The thermal performance is compared to other existing packages with typical application to the automotive industry. The impact of the lead frame geometrical structure and die attach material on the overall thermal behavior is evaluated. Under one steady state (4W) operating scenario, the package reaches a peak temperature of 117.1°C, corresponding to a junction-to-heatsink thermal resistance Rjhs of 4.27°C/W. For the design with a slightly smaller Cu alloy exposed pad (Cu Alloy), the peak temperature reached by the FETs is 117.8°C, slightly higher than for the design with the intermediate size flag. In this case, the junction-to-heatsink thermal resistance Rj-hs is 4.45°C/W. The worst case powering scenario is identified, with 1.312W/FET and total power of 10.5W, barely satisfying the overall thermal budget. The variation of the peak (junction) temperature is also evaluated for several powering scenarios. Finally, a comparison with a different exposed pad package is made. The impact of the higher thermal conductivity (solder) die attach is evaluated and compared to the epoxy die attach in the 54 lead SOIC package. Several cases are evaluated in the paper, with an emphasis on the superior thermal performance of new packages for automotive applications.Copyright