Victor Chiriac

An Alternative Method for the Cooling of Power Microelectronics Using Classical Refrigeration

Classical refrigeration using vapor compression has been widely applied over the last decades to large-scale industrial systems, with few known applications to the microelectronics cooling field, due to the small size limitation. The present study proposes an efficient mechanical refrigeration system to actively cool the electronic components populating a printed circuit board in high-power microelectronics system. The proposed system includes several miniaturized components - compressor, evaporator, condenser - part of a refrigeration system designed to fit the smaller scale power electronics. The system is thermally optimized to reach high COP (coefficients of performance). An array of micro-channels is used for the evaporator/condenser units. A previous study indicated that the R-134s refrigerant provides the best COP/feasibility ratio, while being the most suitable for microelectronics applications (Phelan et al., 2004). The present study develops an analytical model of the proposed small scale vapor compression refrigerator using the R-134a refrigerant. The refrigeration system is thermally optimized for cooling powers ranging from 20 - 100W, with the COP of the system reaching values up to 4.5. In the final section of the study, the efficiency of the proposed system is further compared to existing active cooling techniques using thermoelectric coolers (TEC). The advantages of the proposed system are highlighted, establishing a baseline performance vs. size relationship for vapor-compression refrigerators, to serve as the basis for comparison for future miniaturized refrigeration systems

An overview and comparison of various refrigeration methods for microelectronics cooling

Small-scale refrigerators, termed mesoscale refrigerators, are possible cooling solutions for high-power microelectronics. The performance of mesoscale refrigerators has not yet been experimentally demonstrated, although a recent theoretical model indicated that at temperatures near room temperature and above, a vapor compression refrigerator may compete successfully with a thermoelectric cooler having extremely high efficiency [1]. The present study proposes an overview and comparison between several alternative refrigeration methods used to actively cool the electronic components in a power microelectronics system. Three systems are evaluated, namely a miniaturized classical mechanical vapor compression system using an off-the-shelf compressor, a miniaturized system with ejector used for vapor compression, and finally a miniaturized refrigeration system with absorption, designed for similar cooling powers. The efficiency and COP of each system will be evaluated, together with associated reliability and cost related issues. The specifics of all proposed systems are based on the optimized performance of the miniaturized components of the various refrigeration systems, designed to fit the smaller scale power electronics populating a printed circuit board (PCB) in a high-power microelectronics system. For all designs, an array of micro-channels is used for vaporizer/condenser units. Several components of the refrigeration system are thermally evaluated for cooling powers ranging from 20- 100 W, with direct application to high power telecom units. Several advantages and/or disadvantages of these refrigeration-based cooling methods are highlighted. The study is concluded by identifying the pros and cons of implementing such systems to real-life microelectronics applications.

Miniaturized Refrigeration System With Absorption: Application to Microelectronics Cooling

The study develops an analytical model of an optimized small scale refrigeration system using a thermo-chemical compressor, with application to the cooling of the electronic components populating a Printed Circuit Board (PCB) in a High-Power Microelectronics System. This work continues the authors’ previous study of a refrigeration system with mechanical compression and ejector compression [1–3]. However, the present study introduces the thermo-chemical compressor, comprised of an absorber-desorber unit, also known as refrigeration with absorption. This is a viable alternative to the mechanical compression systems, providing an improved feasibility and reliability at smaller scales. The proposed system includes miniaturized refrigeration components, designed to fit smaller scale power electronics, and uses a binary water-ammonia solution, compact heat exchangers with meso-channels and hydrogen as compensation gas in order to eliminate the circulation pump. The efficiency of the system is evaluated and further compared to mechanical compression designs at similar cooling powers. The study also discusses the thermodynamic cycle specifics and provides an extensive analytical evaluation and calculation of each miniaturized component design. The COP of the system is ∼ 0.4 – 0.5. The study is concluded by identifying the pros and cons of implementing such an absorption system to real-life microelectronics applications. The advantages of the optimized refrigeration design are highlighted, establishing a performance vs. size comparison to vapor-compression refrigerators, to serve as the basis for the enhanced cooling of future miniaturized refrigeration applications.Copyright

A Conjugate Numerical-RC Network Prediction of the Transient Thermal Response of a Power Amplifier Module in Handheld Telecommunication

A study compares two different approaches (numerical vs. RC Network) used to predict the transient thermal response of a Radio Frequency (RF) Power Amplifier (PA) module at a given duty cycle (power on and off periodically) in handheld telecommunication. In the numerical approach, commercial software is used to predict device’s transient thermal response at any arbitrary time of interest for a given set of material properties. To predict the peak and valley temperatures of the device when it reaches steady state, a new methodology is presented, combining the steady state temperature at an averaged power and the temperature difference between single-pulse (at averaged power) and a periodical curve at peak or valley. For multiple heat sources, a linear superposition theory applies. Temperature at any given junction and at any specific time, is a linear superposition of its response to the power applied at all junctions (including itself) summed up over all preceding time history. In the analytical Resistor-Capacitor (RC) network approach, the R’s (thermal resistances) and τ’s (time constants) in a single-pulse are predicted using linear regression curve fitting techniques. For a single-pulse RC model, superposition methodology is applied to solve the transient response in any waveform (single or multiple waves in a cycle). A formulated spreadsheet performs the calculation, with inputs such as pulse width, waiting time (before the pulse is initiated), pulse magnitude and period. The peak and valley temperatures at steady state for a single square wave per cycle are predicted through closed form solutions. For multiple square waves per cycle, individual wave responses must be added together throughout the entire range of the steady state cycle to determine the locations (time) of the peaks and valleys. In order to compare these two approaches, two case studies were conducted on a PA module for a cell phone application: at 12.5% duty cycle and at three-square wave per cycle. Results show good agreement between the numerical and RC model approaches, either at any arbitrary time or at “peak and valley” in steady state. Although the RC network method requires an intermediate creation of the RC model from single pulse numerical solutions (or from experimental measurement), the total time and effort to achieve similar results as compared to the direct numerical method may be considerably reduced. Further, once created, the RC model permits essentially unlimited flexibility and extremely rapid computation for arbitrary power cycling, whereas the direct numerical approach requires “starting over” with every different power cycling description of interest.Copyright

Thermal Performance Comparison between Various RF Transceiver Modules

A detailed numerical study was conducted to investigate the thermal behavior of three RF transceiver modules in a custom environment. The system incorporates the transceiver device and the high density interconnects (HDI) substrate at a fixed boundary condition. In general, the transceiver module requires lesser heat dissipation and thermal requirement may not be as critical as for the power amplifier (PA) module. However, its low thermally conductive die attach material, reduced size of the active areas (micron range) and fairly high power densities lead to the concern that the thermal budget (150 degC) may be exceeded under the various operating scenarios. Each transceiver module was modeled in detail including the device local discrete heat sources, the substrate metal layers, and micro and buried vias distribution across the dielectric layers. The impact of via locations in the substrate is also examined to address the die reliability issues. Results indicated that due to the low power dissipation, the predicted peak temperatures of all three Transceiver modules are below the 150 degC thermal budget. Analyses also suggest that the vias located directly under the die could be removed without any significant thermal penalty. Also, by strategically placing a few vias near the heat sources while removing rest of them in the substrate; it will still satisfy the overall thermal requirements. A detailed comparison between various transceiver designs and associated thermal performance is provided

Modeling Strategy in Evaluating Thermal Performance of an RF Module for Wireless Communications

A detailed study was performed to evaluate the thermal performance of RF Modules and to identify meaningful correlations between specific design characteristics and the power dissipation needed to satisfy the required thermal budget under various critical operating conditions. The investigation focuses on the thermal characteristics of the RF module die layout and transistor cells, and on the thermal impact of the metallic air bridges connecting the load cells to the collector pads/vias to the overall thermal performance of the RF module. A first-pass modeling predicts higher temperatures than IR measurement, by ~20–30%. The addition of the die layout air bridges connecting the load cells in the detailed simulation models leads to a predicted air bridge temperature of ~9% higher than the IR measurement. Additional modeling reveals that between the open (not encapsulated) and the closed module, the die peak temperature differs by less than 3 °C, most of the heat being dissipated through the substrate and board to the heat stage. Thus, the impact of mold compound is insignificant. For a closed module, the mold compound helps dissipate the heat, so the die temperature is slightly cooler than for the open module (<<3°C). This suggests that the die peak temperature measured in an open module can be adjusted (by subtracting 2–3°C) to represent the die temperature in a closed module.Copyright

Impacts of solder voids on PQFN packages' thermal and mechanical performances

Power Quad Flat No-lead (PQFN) packages are extensively used in automotive applications. Features such as solder die attach material, thick copper lead frame, exposed heat sink and heavy gauge aluminum wire, are adopted to ensure good thermal management and reliability performance.

Performance comparisons for electrically conductive epoxies in wireless applications

The thermal conductivity of electrically conductive epoxies is usually the most important factor when considering new epoxy materials for die attach in wireless applications. Some recently developed epoxies with improved mechanical and electrical properties were studied. A combination of numerical modeling, simulation and measured data were used to determine the trends between the thermal, mechanical and electrical performance of various die attach epoxies. The thermal simulation results indicated that the higher (20 W/mK) thermally conductive epoxy provides only a slight improvement (less than 10degC) in thermal performance when considered against the lower (8 W/mK) thermally conductive epoxy. By comparison, the electrical conductivity of the higher thermally conductive epoxy was lower by an order of magnitude than the lower thermally conductive epoxy. Also during the moisture sensitivity level testing (MSL), the higher thermally conductive epoxy exhibited some degree of delamination while the lower thermally conductive epoxy exhibited no delamination. The study revealed that the improved mechanical and electrical properties reduce the reliance on the thermal property as the most important factor in the selection of electrically conductive epoxies

System-Level Thermal Performance Optimization for Electronic Module Incorporating Dual-Channel Power Stage For Digital Amplifier

A detailed numerical study was conducted to model the thermal behavior of a microelectronics module in a custom environment. The system incorporates four 54-lead small outline integrated circuit (SOIC) packages with exposed pads. These packages were coupled to a heat sink at a free convection environment with an external ambient temperature of 25 degC. The system is optimized by choosing the appropriate heat sink for the efficient operation of the device under constant powering, also is used to quantify the thermal impact of each element on the overall thermal performance of the module. The thermal performance for a maximum powering scenario is evaluated, and the peak field-effect transistor (FET) power levels satisfying the thermal budget (150degC) are identified. Several cases were investigated, varying the power levels and the thermal properties of the interfacing pads while maintaining the ambient temperature at 25degC. The peak temperatures for the typical (1.25 W/package) and maximum powering (3.3 W/package) scenarios range from 68degC to 132.5degC, indicating that both designs satisfy the thermal requirements; the corresponding junction-to-ambient thermal resistances (Rja) vary from 8.1degC/W to 8.8degC/W. An additional study evaluates two cases with an improved thermal pad with a thermal conductivity of 20 W/mK, replacing the existing pads, which have a thermal conductivity of 1.1 W/mK. This results in a peak temperature drop by 40degC. The corresponding stack-up thermal resistances were calculated for each layer, and indicate that most of the junction-to-ambient thermal resistance came from the thermal pad and heat sink (HS)-to-ambient thermal resistances. These resistances could be further reduced by applying forced convection to cool the system (thus reducing the heat sink-to-ambient thermal resistance), or by replacing the thermal pads with an improved thermal interface material. The temperature of the heat sink base is fairly uniform, indicating a good lateral heat spreading provided by the heat sink. The thermal interaction between the components is minimal, and could be further reduced when adding a better thermal interface between the package and heat sink

Comprehensive evaluation of solder paste for assembly of PQFN packages

Solder paste has been extensively used to attach power dies in assembling Power Quad Flat No-lead (PQFN) packages. An appropriate solder paste ensures good die bonding quality and good package thermal and reliability performances. A comprehensive procedure is proposed to evaluate new solder pastes for PQFN packages. First, the solder void performance of a given paste is evaluated, as solder void is the main defect related to solder paste in die attach application. The Design Of Experiment (DOE) of reflow profile is conducted on the solder paste. A reflow profile yielding the best solder void performance is accepted as the optimal reflow profile for that solder paste. Then, the impacts that flux residues remaining on the lead frame surface have on the wire bonding and molding qualities are evaluated, as they may deteriorate the qualities significantly. The wire pull test and Temperature Cycling (TC) test are conducted on bonded wires and molded packages. The minimum wire pull force must meet the wire bonding requirement, and no delamination and function failure may be observed throughout the TC test. By evaluating four solder pastes using the above procedure, it is shown that each solder paste possesses its own characteristics and that the proposed comprehensive evaluation is necessary. Only a solder paste that yields acceptable solder void performance and wire bonding quality and that causes no delamination is qualified for assembling PQFN packages.