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Latest external collaboration on country level. Dive into details by clicking on the dots.

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Dive into the research topics where Timothy M. Skergan is active.

Publication


Featured researches published by Timothy M. Skergan.


international test conference | 2008

Functional Test and Speed/Power Sorting of the IBM POWER6 and Z10 Processors

Tung N. Pham; Frances S. M. Clougherty; Gerard M. Salem; James M. Crafts; Jon Robert Tetzloff; Pamela Moczygemba; Timothy M. Skergan

The 5 GHz IBM POWER6 processor (P6) and newest Z10 4.4 GHz processor utilized a custom combination of structural and functional testing delivering improved test costs and accelerated SPQL learning over previous IBM processor generations.


Archive | 2000

Method and system for dynamically configuring a central processing unit with multiple processing cores

Michael Stephen Floyd; Kevin Franklin Reick; Timothy M. Skergan


Archive | 1997

Cache array defect functional bypassing using repair mask

Ravi Kumar Arimilli; John Steven Dodson; Jerry Don Lewis; Timothy M. Skergan


Archive | 2003

Built in self test circuit for measuring total timing uncertainty in a digital data path

Robert L. Franch; William V. Huott; Norman K. James; Phillip J. Restle; Timothy M. Skergan


Archive | 1999

Method and apparatus for implementing IEEE 1149.1 compliant boundary scan

Timothy M. Skergan; Johnny J. LeBlanc


Archive | 1997

Dynamic updating of repair mask used for cache defect avoidance

Ravi Kumar Arimilli; John Steven Dodson; Jerry Don Lewis; Timothy M. Skergan


Archive | 2005

Method for providing low-level hardware access to in-band and out-of-band firmware

James Stephen Fields; Paul Frank Lecocq; Brian Chan Monwai; Thomas Pflueger; Kevin Franklin Reick; Timothy M. Skergan; Scott Barnett Swaney


Archive | 2000

Globally distributed scan blocks

Ravi Kumar Arimilli; Roger Ned Bailey; Johnny J. LeBlanc; Timothy M. Skergan


Archive | 1997

Dual associative-cache directories allowing simultaneous read operation using two buses with multiplexors, address tags, memory block control signals, single clock cycle operation and error correction

Ravi Kumar Arimilli; John Steven Dodson; Jerry Don Lewis; Timothy M. Skergan


Archive | 1997

Method for recoverability via redundant cache arrays

Ravi Kumar Arimilli; John Steven Dodson; Jerry Don Lewis; Timothy M. Skergan

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