Tokihito Suwa

High performance photo-sensitive insulating materials for high density multi-layer wiring boards

The photo-via build-up process is a most significant candidate for fabrication of high density multi-layer wiring boards for high density packaging using CSP and flip-chip direct attach. We have developed a new type of photo-sensitive dielectric. The dielectric delivers high resolution in fabrication of photoformed microvia holes with an aspect ratio of 1.0. The photo-sensitive dielectric showed excellent electrical and mechanical properties for surface mounted wiring boards. It also shows outstanding mechanical properties, especially in the high temperature region. Excellent insulating properties and adhesion were proven, even after pressure cooker test (PCT) conditions. These features offer a great advantage in achieving higher interconnect reliability in direct-chip attachment on low cost multichip modules using sequential build-up substrates.

High performance photo-sensitive insulating materials for MCM-L

The sequential build-up process with photo-sensitive dielectric is a most significant candidate for achieving high density multilayer wiring substrates for low cost multichip modules. A high performance dielectric material is essential in order to obtain high reliability on the wiring substrate. Two types of photo-imageable dielectric have been developed: an aqueous alkaline developable type and a semi-aqueous developable type. The results of the performance evaluation of the dielectric materials and sequential build-up wiring substrates are described here. Both dielectric types deliver high resolution in fabricating photo-formed micro-via holes. The maximum aspect ratio of the micro-via has reached 1.0 for both materials. The aqueous developable type photodielectric showed excellent electrical and mechanical properties for surface mount wiring boards with a panel electroplate subtractive process. The semi-aqueous type high performance photo-dielectric, designed for MCM-L, showed outstanding mechanical properties especially in a high temperature region. Excellent insulating properties and adhesion were proven even after pressure cooker test (PCT) conditions. Sufficient adhesion for full-build electroless copper metallization was also achieved. These features offer a great advantage in achieving higher interconnect reliability in direct chip attachment on low cost multichip modules using sequential build-up substrates.