Tomio Chiba

Development of distributed relaying processor with digital filtering of fast sampled data

In order to cope with advanced relaying techniques, a multimicroprocessor-based digital relay was developed. The main features are distributed processing among five processors, 32-b floating-point operations, digital filtering of fast sampled data, and a personal computer based testing tool. Performance tests of this digital relay showed the following characteristics: (1) the error of any relaying element (distance, overcurrent and undervoltage) was less than 1%; (2) operating time was less than 20 ms when the processing interval was 1.67 ms; and (3) a single relaying processor had a computational capacity of six-phase (ground, short*4 steps*3 phases) distance relays based on differential equations, accompanying elements, and a self-diagnosis function in every processing interval. >

Development of custom LSIs for protective relays and their evolution to new static relays

A relay LSI and a filter LSI are developed for static distance relays. The relay LSI is based on the phase-comparison scheme and applicable to a reactance relay, a mho relay, an offset mho relay, and an ohm relay. Key technologies used to meet the relay requirements are CMOS switched-capacitor technologies. Circuit compositions and characteristic test results are described. A prototype relay unit demonstrated superiority to a conventional unit in terms of its compactness. High reliability (because of the small number of parts), high accuracy, and very low power dissipation. >