Toshiaki Edahiro

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international solid-state circuits conference | 2009

Takuya Futatsuyama; Norihiro Fujita; Naoya Tokiwa; Yoshihiko Shindo; Toshiaki Edahiro; Teruhiko Kamei; Hiroaki Nasu; Makoto Iwai; Koji Kato; Yasuyuki Fukuda; Naoaki Kanagawa; Naofumi Abiko; Masahide Matsumoto; Toshihiko Himeno; Toshifumi Hashimoto; Yi-Ching Liu; Hardwell Chibvongodze; Takamitsu Hori; Manabu Sakai; Hong Ding; Yoshiharu Takeuchi; Hitoshi Shiga; Norifumi Kajimura; Yasuyuki Kajitani; Kiyofumi Sakurai; Kosuke Yanagidaira; Toshihiro Suzuki; Yuko Namiki; Tomofumi Fujimura; Man Mui

NAND flash memories are used in digital still cameras, cellular phones, MP3 players and various memory cards. As seen in the growing needs for applications such as solid-state drives and video camcoders, the market demands for larger-capacity storage has continuously increased and NAND Flash memories are enabling a wide range of new applications. In such situations, to achieve larger capacity at low cost per bit, technical improvement in feature-size scaling [1], multi-bit per cell [2,3] and area reduction are essential.

international solid-state circuits conference | 2011

Koichi Fukuda; Yoshihisa Watanabe; Eiichi Makino; Koichi Kawakami; Jumpei Sato; Teruo Takagiwa; Naoaki Kanagawa; Hitoshi Shiga; Naoya Tokiwa; Yoshihiko Shindo; Toshiaki Edahiro; Takeshi Ogawa; Makoto Iwai; Osamu Nagao; Junji Musha; Takatoshi Minamoto; Kosuke Yanagidaira; Yuya Suzuki; Dai Nakamura; Yoshikazu Hosomura; Yuka Furuta; Mai Muramoto; Rieko Tanaka; Go Shikata; Ayako Yuminaka; Kiyofumi Sakurai; Manabu Sakai; Hong Ding; Mitsuyuki Watanabe; Yosuke Kato

NAND flash memories are now indispensable for our modern lives. The application range of the storage memory devices began with digital still cameras and has been extended to USB memories, memory cards, MP3 players, cell phones including smart phones, netbooks, and so on. This is because higher storage capacity and lower cost are realized through means of technology scaling every year. Emerging markets, such as solid-state drives (SSDs) and data-storage servers, require lower bit cost, higher program and read throughputs, and lower power consumption

IEEE Journal of Solid-state Circuits | 2012

Koichi Fukuda; Yoshihisa Watanabe; Eiichi Makino; Koichi Kawakami; Jumpei Sato; Teruo Takagiwa; Naoaki Kanagawa; Hitoshi Shiga; Naoya Tokiwa; Yoshihiko Shindo; Takeshi Ogawa; Toshiaki Edahiro; Makoto Iwai; Osamu Nagao; Junji Musha; Takatoshi Minamoto; Yuka Furuta; Kosuke Yanagidaira; Yuya Suzuki; Dai Nakamura; Yoshikazu Hosomura; Rieko Tanaka; Mai Muramoto; Go Shikata; Ayako Yuminaka; Kiyofumi Sakurai; Manabu Sakai; Mitsuyuki Watanabe; Yosuke Kato; Toru Miwa

A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the chip size, 2-physical-plane configuration with 16 KB wordline-length, a new bit-line hook-up architecture, and a top-metal-congestion-free optimized peripheral circuit floor plan, are introduced. As a result, 151 mm2 die size with an excellent 79% cell area efficiency is achieved. Newly introduced precharge detect algorithm and smart precharge algorithm improve program throughput by 10%. 14 MB/s program throughput is obtained, which is comparable or even higher performance than NAND flash memories reported in the previous 30 nm technology generation. The proposed smart precharge algorithm reduces program operation current by 6%, and 25 mA operation current with 16 KB programming is achieved. Moreover, a high-speed asynchronous DDR interface is incorporated and 266 MB/s data transfer is achieved.

Archive | 2008