Toshihisa Hamano

Poly-Silicon Thin-Film Transistors with Uniform Performance Fabricated by Excimer Laser Annealing

Uniform performance in poly-Si thin-film transistors (TFTs) has been successfully achieved by excimer laser annealing. Mobility and its uniformity over a substrate were 59±3 cm2/Vs for n-channel TFTs and 45±5 cm2/Vs for p-channel types. To achieve uniform performance, we combined step annealing that uses two energy levels, and small-pitch annealing that moves a beam forward by a small pitch. The proposed method can improve surface morphology and uniformity of grain size in poly-Si. A 400-stage CMOS shift register composed of these TFTs could operate at 5 V, and attained the speed of 1 MHz at 8 V.

An Amorphous Si High Speed Linear Image Sensor

An amorphous silicon thin film linear image sensor of a sandwich structure has been developed. The sensor consists of a transparent ITO as an upper electrode, an a-Si: H layer and Cr or Al lower electrodes. The a-Si: H layer is formed by RF glow discharge. These layers are deposited on a glass or ceramic substrate. The sensor has good photoelectric characteristics as follows: Photo-sensitivity is 10-7 A/cm2 1x, photo-response time is less than 0.5 ms and photo- to dark-current ratio is larger than 3×103. The sensor can be operated by a -5 V single power source and this same power source can be used for the driving circuits. A 1056-bit, 8 bit/mm linear image sensor has been fabricated. Using the device, images of a document have been read and reproduced successfully.

A new method to estimate grain boundary trap state density in poly-Si TFTs

A new method of estimating grain boundary trap state density in poly-Si thin film transistors (TFTs) is proposed by modifying an assumption used in Levinsons method. Our method assumes that only the carrier near the surface contributes to the total current, and the other carrier is neglected. Then the carrier density at the surface is used to express the potential barrier height induced at the grain boundary instead of the averaged carrier density as in Levinsons method. The validity of our assumption is investigated using our two-dimensional device simulator, and it is shown that our assumption on the carrier density is suitable to derive the true trap state density.

640 x 400 pixels a-Si:H TFT-driven 2D image sensor

A 640 X 400 pixels and 64 dots/mm2 2-dimensional (2-D) contact image sensor has been fabricated by integrating amorphous silicon (a-Si:H) photodiodes (PDs) and thin film transistors (TFTs). The sensor consists of 400 gate and 640 signal lines, and thus contains 256,000 pixels. The PD has a Cr/n-i-p a-Si:H/ITO structure. The TFT has an inverted staggered structure and Ta/TaMo is used for a gate electrode in order to suppress a gate pulse delay. When the TFTs of the n-th row are turned on, photo-generated charges stored in the PD capacitances in the n-th row are transferred to their respective signal line capacitances. After that, the charges are detected by an external voltage sensitive amplifier. The 640 parallel outputs are converted to the serial analog signal by a multiplexer for image processing. The sensor has achieved photoresponsivity of 7.2 V/lx-s, photoresponsivity non-uniformity of +/- 8% and the signal-to-noise (S/N) ratio of 50 dB at the operation of 30 ms/frame scanning speed. Crosstalk as the influence of adjacent lines both X and Y direction is less than 1.3%. This value is estimated to enable achievement of more than 64 levels of gray. The reproduced image quality regarding resolution was good for 8-point kanji characters. This technology will be applicable for multifunctional input/output device mounted on a system such as a pen computer and X-ray detector coupled to a scintillator.

a-Si:H TFT-driven high-gray-scale contact image sensor with a ground-mesh-type multiplex circuit

An A4 page width and 300 dot/inch hydrogenated amorphous silicon thin film transistor (a- Si:H TFT) driven contact image sensor which can read more than 128 gray levels has been developed. Crosstalk due to the coupling between data lines in the multiplex circuit has prevented high gray scale reading. In order to eliminate crosstalk, a sensor with a new multiplex structure has been developed with a ground mesh shield layer inserted at the crossover points between each data line. The ground mesh shield pattern was designed to optimize the gray scale reproduction ratio R. With this sensor, R is more than 0.992 for a single bit, thus achieving 128 levels of gray. This design was compared to the performance of two other sensors, one without a ground mesh shield, the other using a data line meander pattern. This technology is also applicable to higher performance image sensors with greater than 400 dot/inch resolution.

Methodology in design of a page width a-Si TFT linear image sensor

Abstract A circuit design method for a matrix driven linear image sensor has been developed. Relations between the circuit parameters and the performance of the sensor are resolved by analysis of the equivalent circuit. Optimizing for gray scale performance is accomplished by adjustment of circuit parameters. The effectiveness of this method has been demonstrated by the development of an actual sensor having the capability of resolving 16 levels of gray scale.

Low Resistance α-Ta Film For Large Area Electronic Devices

A New method of the low resistivity α -Ta deposition technique has been developed. The sputtered Ta film deposited on TaMo alloy has bcc structure ( α -Ta) in contrast to tetragonal of the Ta mono layer ( β -Ta), and shows the resistivity as low as 22 μΩ cm. The mechanism of this transformation is not explained by simple epitaxial growth. X-ray diffraction analysis and RBS analysis indicated that the TaMo alloy layer, due to Mo diffusion from the under layer, acts as a seed plane of growth. The Ta/TaMo layered film is suitable for Large Area Electronic devices for its low resistivity.