Mario Fuse

Single-transverse-mode 3.4-mW emission of oxide-confined 780-nm VCSELs

The authors have fabricated oxide-confined vertical-cavity surface-emitting lasers with metal apertures exhibiting a spatial mode filtering effect. Single-mode continuous-wave output is enhanced up to 3.4 mW by this effect for AlGaAs-based 780-nm vertical-cavity surface-emitting lasers with a 3.5-/spl mu/m-diameter oxide aperture. From numerical calculations, the round-trip loss difference between zeroth- and first-order optical modes as a function of metal aperture size indicates that there is an optimum point; a 4-/spl mu/m metal aperture size is suitable for higher order mode suppression of a 3.5-/spl mu/m oxide aperture device.

Poly-Silicon Thin-Film Transistors with Uniform Performance Fabricated by Excimer Laser Annealing

Uniform performance in poly-Si thin-film transistors (TFTs) has been successfully achieved by excimer laser annealing. Mobility and its uniformity over a substrate were 59±3 cm2/Vs for n-channel TFTs and 45±5 cm2/Vs for p-channel types. To achieve uniform performance, we combined step annealing that uses two energy levels, and small-pitch annealing that moves a beam forward by a small pitch. The proposed method can improve surface morphology and uniformity of grain size in poly-Si. A 400-stage CMOS shift register composed of these TFTs could operate at 5 V, and attained the speed of 1 MHz at 8 V.

An Amorphous Si High Speed Linear Image Sensor

An amorphous silicon thin film linear image sensor of a sandwich structure has been developed. The sensor consists of a transparent ITO as an upper electrode, an a-Si: H layer and Cr or Al lower electrodes. The a-Si: H layer is formed by RF glow discharge. These layers are deposited on a glass or ceramic substrate. The sensor has good photoelectric characteristics as follows: Photo-sensitivity is 10-7 A/cm2 1x, photo-response time is less than 0.5 ms and photo- to dark-current ratio is larger than 3×103. The sensor can be operated by a -5 V single power source and this same power source can be used for the driving circuits. A 1056-bit, 8 bit/mm linear image sensor has been fabricated. Using the device, images of a document have been read and reproduced successfully.

Effects of Silicon Implantation and Processing Temperature on Performance of Polycrystalline Silicon Thin-Film Transistors Fabricated from Low Pressure Chemical Vapor Deposited Amorphous Silicon

Silicon implantation has been found to dramatically enhance the grain size of polysilicon crystallized from LPCVD a-Si by retarding the nucleation process at the substrate interface. Corresponding improvement in TFT device performance was also observed, resulting in field effect mobilities as high as 109 cm 2 /Vs in devices with 1000 A thick Si active layer. This effect is more significant in device fabrication processes with higher temperature, possibly due to increasingly efficient removal of implant related defects.

A new method to estimate grain boundary trap state density in poly-Si TFTs

A new method of estimating grain boundary trap state density in poly-Si thin film transistors (TFTs) is proposed by modifying an assumption used in Levinsons method. Our method assumes that only the carrier near the surface contributes to the total current, and the other carrier is neglected. Then the carrier density at the surface is used to express the potential barrier height induced at the grain boundary instead of the averaged carrier density as in Levinsons method. The validity of our assumption is investigated using our two-dimensional device simulator, and it is shown that our assumption on the carrier density is suitable to derive the true trap state density.