Trung Anh Dinh

A network-flow-based optimal sample preparation algorithm for digital microfluidic biochips

Sample preparation, which is a front-end process to produce droplets of the desired target concentrations from input reagents, plays a pivotal role in every assay, laboratory, and application in biomedical engineering and life science. The consumption of sample/buffer/waste is usually used to evaluate the effectiveness of a sample preparation process. In this paper, for the first time, we present an optimal sample preparation algorithm based on a minimum-cost maximum-flow model. By using the proposed model, we can obtain both the optimal cost of sample and buffer usage and the waste amount even for multiple-target concentrations. Experiments demonstrate that we can consistently achieve much better results not only in the consumption of sample and buffer but also the waste amount when compared with all the state-of-the-art of the previous approaches.

Control-layer optimization for flow-based mVLSI microfluidic biochips

Recent advantages in flow-based microfluidic biochips have enabled the emergence of lab-on-a-chip devices for bimolecular recognition and point-of-care disease diagnostics. However, the adoption of flow-based biochips is hampered today by the lack of computer-aided design tools. Manual design procedures not only delay product development but they also inhibit the exploitation of the design complexity that is possible with current fabrication techniques. In this paper, we present the first practical problem formulation for automated control-layer design in flow-based microfluidic VLSI (mVLSI) biochips and propose a systematic approach for solving this problem. Our goal is to find an efficient routing solution for control-layer design with a minimum number of control pins. The pressure-propagation delay, an intrinsic physical phenomenon in mVLSI biochips, is minimized in order to reduce the response time for valves, decrease the pattern set-up time, and synchronize valve actuation. Two fabricated flow-based devices and five synthetic benchmarks are used to evaluate the proposed optimization method. Compared with manual control-layer design and a baseline approach, the proposed approach leads to fewer control pins, better timing behavior, and shorter channel length in the control layer.

Reliability-Driven Pipelined Scan-Like Testing of Digital Microfluidic Biochips

A digital micro fluidic biochip (DMFB) is an attractive platform for immunoassays, point-of-care clinical diagnostics, DNA sequencing, and other laboratory procedures in biochemistry. Effective testing methods are required to ensure robust DMFB operation and high confidence in the outcome of biochemical experiments. Prior work on DMFB testing does not address the problem of designing the test to minimize reliability degradation during test application. It also ignores physical constraints arising from fluidic behavior and the physics of electro wetting-on-dielectric. We develop a practical and realistic testing method by first systematically analyzing the influence of actuation voltage and actuation frequency on the distribution of the electric field, and its resulting effect on dielectric degradation. Next, we use this analysis to choose appropriate parameter settings for testing, and proposes a new pipelined scan-like testing method. Both static and dynamic fluidic constraints are considered in the new testing method, and a diagnosis technique is presented to easily locate defects. Finally, simulation results are presented to demonstrate the effectiveness of the proposed testing approach in minimizing test-completion time.

A logic integrated optimal pin-count design for digital microfluidic biochips

Digital microfluidic biochips have become one of the most promising technologies for biomedical experiments. In modern microfluidic technology, reducing the number of independent control pins that reflects most of the fabrication cost, power consumption and reliability of a microfluidic system, is a key challenge for every digital microfluidic biochip design. However, all the previous chip designs sacrifice the optimality of the problem, and only limited reduction on the number of control pins is observed. Moreover, most existing designs cannot satisfy high-throughput demand for bioassays, and thus inapplicable in practical contexts. In this paper, we propose the first optimal pin-count design scheme for digital microfluidic biochips. By integrating a very simple combinational logic circuit into the original chip, the proposed scheme can provide high-throughput for bioassays with an information-theoretic minimum number of control pins. Furthermore, to cope with the rapid growth of the chips scale, we also propose a scalable and efficient heuristics. Experiments demonstrate that the proposed scheme can obtain much fewer number of control pins compared with the previous state-of-the-art works.

A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips

Microfluidic biochips have been recently proposed to integrate all the necessary functions for biochemical analysis. There are several types of microfluidic biochips; among them there has been a great interest in flow-based microfluidic biochips, in which the flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex resource units such as micropumps, switches and mixers can be built. For efficient execution, the flow of liquid routes in microfluidic biochips needs to be scheduled under some resource constraints or routing constraints. The execution time of the biochemical operations depends on the binding and scheduling results. The most previously developed binding and scheduling algorithms are based on heuristics, and there has been no method to obtain optimal results. Considering the above, this paper proposes an optimal method by casting the problem to a clique problem.

An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic Biochips

Digital microfluidic biochips have become one of the most promising technologies for biomedical experiments. In modern microfluidic technology, reducing the number of independent control pins that reflects most of the fabrication cost, power consumption, and reliability of a microfluidic system, is a key challenge for every digital microfluidic biochip design. However, all the previous chip designs sacrifice the optimality of the problem, and only limited reduction on the number of control pins is observed. Moreover, most existing designs cannot satisfy high-throughput demand for bioassays, and thus inapplicable in practical contexts. In this paper, we propose the first optimal pin-count design scheme for digital microfluidic biochips. By integrating a very simple combinational logic circuit into the original chip, the proposed scheme can provide high-throughput for bioassays with an information-theoretic minimum number of control pins. Furthermore, to cope with the rapid growth of the chips scale, we also propose a scalable and efficient heuristics to reduce the number of control pins. A logic optimization technique, which can be used to reduce the complexity of the integrated combinational logic circuit, is also presented in this paper. Experiments demonstrate that the proposed scheme can obtain much fewer number of control pins compared with the previous state-of-the-art works.

Control-Layer Routing and Control-Pin Minimization for Flow-Based Microfluidic Biochips

Recent advances in flow-based microfluidic biochips have enabled the emergence of lab-on-a-chip devices for bimolecular recognition and point-of-care disease diagnostics. However, the adoption of flow-based biochips is hampered today by the lack of computer-aided design tools. Manual design procedures not only delay product development but they also inhibit the exploitation of the design complexity that is possible with current fabrication techniques. In this paper, we present the first practical problem formulation for automated control-layer design in flow-based microfluidic very large-scale integration (mVLSI) biochips and propose a systematic approach for solving this problem. Our goal is to find an efficient routing solution for control-layer design with a minimum number of control pins. The pressure-propagation delay, an intrinsic physical phenomenon in mVLSI biochips, is minimized in order to reduce the response time for valves, decrease the pattern set-up time, and synchronize valve actuation. Two fabricated flow-based devices and six synthetic benchmarks are used to evaluate the proposed optimization method. Compared with manual control-layer design and a baseline approach, the proposed approach leads to fewer control pins, better timing behavior, and shorter channel length in the control layer.

A general testing method for digital microfluidic biochips under physical constraints

Digital microfluidics is viewed as one of the most promising technologies for biomedical experiments. Digital microfluidic biochips are often used today for applications such as point-of-care health assessment, drug discovery, and air-quality monitoring. Therefore, such devices must be adequately tested after manufacturing to guarantee the correctness of the biomedical experiments. Previous test methods for digital microfluidic biochips are either unable to cover all chip defects or inapplicable for application-specific biochips with arbitrary layouts. Furthermore, previous methods also ignore the fluidic constraints required for droplet routing, which makes the test droplet routing problem much more challenging in realistic test-application scenarios. In this paper, we propose the first test method for digital microfluidic biochips that is not only able to cover all chip defects, but is also applicable for arbitrary chip layouts. Moreover, we propose an optimization technique to route test droplets with minimum test-application time. A polynomial-time scheduling algorithm is also presented to solve the optimization problem in an efficient manner. Experiments demonstrate that the proposed test method requires significantly less test-application time compared to related previous work.

ILP-based Synthesis for Sample Preparation Applications on Digital Microfluidic Biochips

Digital micro fluidic biochips have become one of the most promising technologies in many biomedical fields. In a digital micro fluidic biochip, a group of (adjacent) cells in the micro fluidic array can be configured to work as storage, functional operations, as well as for transporting fluid droplets dynamically. There has been proposed a very efficient Integer Linear Programming (ILP)-based method to schedule operations with considering this dynamic reconfigurability. However, the method cannot directly deal with a case having an operation with multiple successors, which is necessary in some bioassays, e.g., Sample preparation applications. Sample preparation is a crucial preprocessing step to produce droplets of the desired target concentrations from input reagents. In every optimized application graphs for sample preparation, there are many operations with more than one successors. Thus, the previous method cannot be used to get an optimal scheduling, and thus we propose a new framework to use another ILP formulation for scheduling operations in a digital micro fluidic biochips. Our formulation can successfully deal with a case where there is a node with multiple successors. Also, our method can find a binding solution at the same time unlike the above-mentioned previous one thanks to our new ILP formulation. Although our ILP formulation seems to be a bit more complex than the previous one, a preliminary experiment demonstrates that the proposed ILP formulation can successfully find the optimal scheduling for practical sample preparation applications within a reasonable time.

Testing of digital microfluidic biochips with arbitrary layouts

As in the case of VLSI circuits, digital microfluidic biochips must be adequately tested after manufacturing to guarantee the correctness of the biomedical experiments. In this work, we propose an efficient test method for digital microfluidic biochips. In contrast to related prior work, the proposed test method is not only able to cover all chip defects but also applicable to arbitrary chip layouts. Experiments demonstrate that using the proposed test method, the test-application time can be reduced significantly compared to related prior work.