Tsai Chi Huang

The teaching of VHDL in computer architecture

There are problems in incorporating VHDL into the undergraduate curriculums beginning computer architecture courses. The problems relate mainly to cost arising from two factors: VHDL tool availability and proper lecture material to coincide with the course objective(s). At the Georgia Institute of Technology, pilot VHDL lecture materials have been developed to address these two issues.

Predicting communication protocol performance on superscalar architectures using instruction dependency

Increasing diversity in telecommunication workloads leads to greater complexity in communication protocols. This occurs as channel bandwidth rapidly increases. These factors result in larger computational loads for network processors that are increasingly turning to high performance microprocessor designs. This paper presents an analytical method for estimating the performance of instruction level parallel (ILP) processors executing network protocol processing applications. Instruction dependency information extracted while executing an application is used to calculate upper and lower bounds for throughput, measured in instructions per cycle (IPC). Results using UDP/TCP/IP applications show that the simulated IPC values fall between the analytically derived upper and lower bounds, validating the model. The analytical method is much less expensive than cycle-accurate simulation, but reveals similar throughput performance predictions. This allows the architectural design space for network superscalar processors to be explored more rapidly and comprehensively, to reveal the maximum IPC that is possible for a given application workload and the available hardware resources.

A VLSI system implementation for real-time object detection

Real-time image processing for object detection at high frame rates requires a high-performance system. Its effectiveness in object recognition over a wide range of image characteristics is proportional to its provision for varying signal processing techniques. Thus, a system designed to exhibit high performance with respect to one particular type of image and object can not be expected to prove suitable for images or objects with different characteristics. Therefore to detect different types of objects at high frame rates over a range of image characteristics, a system must offer a variety of signal processing techniques. Since general-purpose processors fall short of the performance needed in providing the necessary variety and combination of signal processing techniques, an object detection system has been designed and is being built using VLSI implementations of the signal processing techniques.

Teaching pipelining and concurrency using hardware description languages

Relating to a previous simplified VHDL processor model, a more advanced synthesized VHDL pipeline microprocessor model was developed and has been used in the second term computer architecture course offered in the School of Electrical and Computer Engineering at the Georgia Institute of Technology, USA. This paper first describes the pipeline processor model and its VHDL implementation. It then presents various implementation extensions that have been assigned and completed within a satisfactory period by participating students.