Tsung-Yi Huang

Mobile Charge Induced Breakdown Instability in 700V LDMOSFET

One chip solution for SMPS (switch mode power supply) has been drawing great attention of the designers with its green mode standby power and high efficiency in the AC-DC adaptor and LED lighting applications. The UHV (ultra-high voltage) foundry process, which enables the integration solution for green compliance SMPS, is proposed in this paper. The technology integrated low voltage CMOS (5 V), medium voltage (40 V) and UHV (700 V) devices in one single process. The UHV technology provides a novel UHV device structure with RESURF (Reduce-SURface-Field) effect to sustain ultra-high breakdown voltage and not to affect the original low/medium voltage devices performance in the same time. Thus, the concept of this novel structure is easily to apply to the other technology nodes and extend its voltage-sustaining range by adjusting the drift length for the RESURF structure. In this research, the 700 V technology has realized the performance that the BVdss (breakdown voltage) is 800 V with Ronsp (on-resistance) of 270 mOhm-cm2. In the same time, the process challenge to optimize 700 V device performance against un-balanced mobile charge issue was also discussed.

Low-Leakage Diode String Design without Extra Circuits for ESD Applications

A novel low-leakage diode string design using separate diode objects in 0.18mum CMOS processes is proposed in this paper. Diode strings can be divided into two (or three) groups with only a large shallow trench isolation (STI) used as spacing. With STI used to separate the groups, the diode string successfully prevents excessive current leakage. The turn-on voltage of the diode string can be derived from the equations concluded from the experiments

The device characteristics of partially undoped poly-silicon gate P-LDMOS power transistors

The effect of partially undoped poly-silicon gate above the drift region in P-lateral double-diffused MOS (P-LDMOS) Transistors is investigated. Experiment results show that it can improve the off-state leakage current and reduce the on-state resistance. For hot carrier performance, this structure induces a higher initial current shift due to less vertical field. The long-term hot carrier degradation behavior of this device is the same as that of the standard devices.

On-state resistance improvement by partially slotted STI LDMOS transistor in 0.25-micron smart power technology

The improvement of on-state resistance with partially slotted STI (shallow trench isolation) for medium voltage power devices in an advanced 0.25 um BiCMOS-DMOS process is implemented. Experiment results show that our proposed device can reduce 20% RON without hurting breakdown voltage. The partially slotted STI structure avoids breakdown voltage to decrease and also shortens the drain current path due to a 3-dimentional electric field shaping. Careful design for slotted STI profile is needed to achieve the optimum RON-BV tradeoff performance.