Tyler J. Gomm

CONTROLLING A DELAY LOCK LOOP CIRCUIT

SYNCHRONIZATION DEVICES HAVING INPUT/OUTPUT DELAY MODEL TUNING ELEMENTS IN SIGNAL PATHS TO PROVIDE TUNING CAPABILITIES TO OFFSET SIGNAL MISMATCH

Method and apparatus for determining digital delay line entry point

Delay circuit with reset-based forward path static delay

Clock synchronizing apparatus and method using frequency dependent variable delay

Synchronous clock generator including duty cycle correction

MULTIPLE DEVICE APPARATUS, SYSTEMS, AND METHODS

Synchronization device with delay line control circuit to control amount of delay added to input signal and tuning elements to receive signal form delay circuit

Trimmable delay locked loop circuitry with improved initialization characteristics

Apparatus and method for selectively configuring a memory device using a bi-stable relay