Tyler J. Grassman

Control and elimination of nucleation-related defects in GaP/Si(001) heteroepitaxy

GaP films were grown on offcut Si(001) substrates using migration enhanced epitaxy nucleation followed by molecular beam epitaxy, with the intent of controlling and eliminating the formation of heterovalent (III-V/IV) nucleation-related defects—antiphase domains, stacking faults, and microtwins. Analysis of these films via reflection high-energy electron diffraction, atomic force microscopy, and both cross-sectional and plan-view transmission electron microscopies indicate high-quality GaP layers on Si that portend a virtual GaP substrate technology, in which the aforementioned extended defects are simultaneously eliminated. The only prevalent remaining defects are the expected misfit dislocations due to the GaP–Si lattice mismatch.

Characterization of Metamorphic GaAsP/Si Materials and Devices for Photovoltaic Applications

GaAsyP1-y anion-sublattice compositionally graded buffers and device structures were grown directly on Si(100) substrates by way of a high-quality GaP integration layer, yielding GaAsP target layers having band gaps of photovoltaic interest (1.65-1.8 eV), free of antiphase domains/borders, stacking faults, and microtwins. GaAsyP1-y growths on both Si and GaP substrates were compared via high-resolution X-ray diffractometry of the metamorphic buffers and deep-level transient spectroscopy (DLTS) of p+-n diodes that are lattice matched to the final buffer layer. Structural analysis indicates highly efficient epitaxial relaxation throughout the entire growth structure for both types of samples and suggests no significant difference in physical behavior between the two types of samples. DLTS measurements performed on GaAsP diodes fabricated on both Si and GaP substrates reveal the existence of identical sets of traps residing in the n-type GaAsP layers in both types of samples: a single majority carrier (electron) trap, which is located at EC - 0.18 eV, and a single minority carrier (hole) trap, which is located at EV + 0.71 eV. Prototype 1.75-eV GaAsP solar cell test devices grown on GaAsyP1-y/Si buffers show good preliminary performance characteristics and offer great promise for future high-efficiency III-V photovoltaics integrated with Si substrates and devices.

Nucleation-related defect-free GaP/Si(100) heteroepitaxy via metal-organic chemical vapor deposition

GaP/Si heterostructures were grown by metal-organic chemical vapor deposition in which the formation of all heterovalent nucleation-related defects (antiphase domains, stacking faults, and microtwins) were fully and simultaneously suppressed, as observed via transmission electron microscopy (TEM). This was achieved through a combination of intentional Si(100) substrate misorientation, Si homoepitaxy prior to GaP growth, and GaP nucleation by Ga-initiated atomic layer epitaxy. Unintentional (311) Si surface faceting due to biatomic step-bunching during Si homoepitaxy was observed by atomic force microscopy and TEM and was found to also yield defect-free GaP/Si interfaces.

Direct and indirect causes of Fermi level pinning at the SiO/GaAs interface

The correlation between atomic bonding sites and the electronic structure of SiO on GaAs(001)-c(2x8)/(2x4) was investigated using scanning tunneling microscopy (STM), scanning tunneling spectroscopy (STS), and density functional theory (DFT). At low coverage, STM images reveal that SiO molecules bond Si end down; this is consistent with Si being undercoordinated and O being fully coordinated in molecular SiO. At approximately 5% ML (monolayer) coverage, multiple bonding geometries were observed. To confirm the site assignments from STM images, DFT calculations were used to estimate the total adsorption energies of the different bonding geometries as a function of SiO coverage. STS measurements indicated that SiO pins the Fermi level midgap at approximately 5% ML coverage. DFT calculations reveal that the direct causes of Fermi level pinning at the SiO GaAs(001)-(2x4) interface are a result of either local charge buildups or the generation of partially filled dangling bonds on Si atoms.

Tunnel junction enhanced nanowire ultraviolet light emitting diodes

Polarization engineered interband tunnel junctions (TJs) are integrated in nanowire ultraviolet (UV) light emitting diodes (LEDs). A ∼6 V reduction in turn-on voltage is achieved by the integration of tunnel junction at the base of polarization doped nanowire UV LEDs. Moreover, efficient hole injection into the nanowire LEDs leads to suppressed efficiency droop in TJ integrated nanowire LEDs. The combination of both reduced bias voltage and increased hole injection increases the wall plug efficiency in these devices. More than 100 μW of UV emission at ∼310 nm is measured with external quantum efficiency in the range of 4–6 m%. The realization of tunnel junction within the nanowire LEDs opens a pathway towards the monolithic integration of cascaded multi-junction nanowire LEDs on silicon.

GaAs

Monolithic, epitaxial, series-connected GaAs0.75P0.25/Si dual-junction solar cells, grown via both molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD), are reported for the first time. Fabricated test devices for both cases show working tandem behavior, with clear voltage addition and spectral partitioning. However, due to thermal budget limitations in the MBE growth needed to prevent tunnel junction failure, the MBE-grown GaAs0.75P0.25 top cell was found to be lower quality than the equivalent MOCVD-grown device. Additionally, despite the reduced thermal budget, the MBE-grown tunnel junction exhibited degraded behavior, further reducing the overall performance of the MBE/MOCVD combination cell. The all-MOCVD-grown structure displayed no such issues and yielded significantly higher overall performance. These initial prototype cells show promising performance and indicate several important pathways for further device refinement.

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Enabled by a heteroepitaxial nucleation process that yields GaP-on-Si integration free of heterovalent-related defects, GaP/active-Si junctions were grown by metalorganic chemical vapor deposition. n-type Si emitter layers were grown on p-type (1 0 0)-oriented Si substrates, followed by the growth of n-type GaP window layers, to form fully active subcell structures compatible with integration into monolithic III-V/Si multijunction solar cells. Fabricated test devices yield good preliminary performance characteristics and demonstrate great promise for the epitaxial subcell approach. Comparison of different emitter layer thicknesses, combined with descriptive device modeling, reveals insight into recombination dynamics at the GaP/Si interface and provides design guidance for future device optimization. Additional test structures consisting of GaP/active-Si subcell substrates with subsequently grown GaAsyP1-y step-graded buffers and GaAs0.75P0.25 terminal layers were produced to simulate the optical response of the GaP/Si junction within a theoretically ideal dual-junction solar cell.

P

Electron channeling contrast imaging (ECCI) is used to characterize misfit dislocations in heteroepitaxial layers of GaP grown on Si(100) substrates. Electron channeling patterns serve as a guide to tilt and rotate sample orientation so that imaging can occur under specific diffraction conditions. This leads to the selective contrast of misfit dislocations depending on imaging conditions, confirmed by dynamical simulations, similar to using standard invisibility criteria in transmission electron microscopy (TEM). The onset and evolution of misfit dislocations in GaP films with varying thicknesses (30 to 250 nm) are studied. This application simultaneously reveals interesting information about misfit dislocations in GaP/Si layers and demonstrates a specific measurement for which ECCI is preferable versus traditional plan-view TEM.

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The development and demonstration of methodologies for the heteroepitaxy of GaP on Si substrates, free of heterovalent interface related defects, and the subsequent metamorphic grading in the GaAsyP1-y alloy system necessary to achieve target III-V materials at sufficiently high quality, directly enable the achievement of monolithically-integrated multijunction solar cells utilizing both III-V and Si active sub-cells. Such devices hold promise for high photovoltaic performance at significantly reduced costs afforded by the Si platform. In this vein, early-stage prototype all-epitaxial GaAs0.75P0.25/Si dual-junction devices have been grown by a combination of MOCVD and MBE, demonstrating great promise for such an approach, and clear pathways for further improvement.

/Si Dual-Junction Solar Cells Grown by MBE and MOCVD

A III-V/Si metamorphic epitaxy approach to achieve multi-junction solar cells having nearly ideal optical partitioning of the solar spectrum is described. Following our previously-established methodology for the growth of defect-free GaP on Si(100) substrates and demonstrations of heteroepitaxially integrated III-V-on-Si photovoltaics via GaAsyP1-y metamorphic buffers, we discuss work undertaken on the further development and refinement of these processes and materials, with the goal of minimization of threading dislocation densities in order to enable high-performance solar cells. A substantial, non-trivial increase in growth temperature and general improvement of growth conditions and designs has been achieved for both the heterovalent GaP/Si epitaxial integration process and the GaAsyP1-y compositional grading. Improved dislocation glide and significantly more efficient epitaxial relaxation is found for the GaP/Si system, while enhanced dislocation glide dynamics in the metamorphic GaAsyP1-y buffer system is demonstrated by the evolution of new epitaxial tilt characteristics.