U. Lott

A 5.2 GHz variable gain LNA MMIC for adaptive antenna combining

A variable gain LNA was designed for HIPERLAN I. A noise figure of only 1.7 dB is measured at a gain of 14.5 dB and a power consumption of 9 mW (V/sub DC/=3 V, I/sub DC/=3 mA). Over an amplitude control range of 20 dB, the third order intercept point at the input is higher than -10 dBm, the spurious free dynamic range is higher than 55 dB and noise performance does not effectively degrade. Noise and intermodulation performance of different amplitude control methods as well as the required resolutions for D/A converters are investigated.A variable gain LNA was designed for HIPERLAN I. A noise figure of only 1.7 dB is measured at a gain of 14.5 dB and a power consumption of 9 mW (V/sub DC/=3 V, I/sub DC/=3 mA). Over an amplitude control range of 20 dB, the third order intercept point at the input is higher than -10 dBm, the spurious free dynamic range is higher than 55 dB and noise performance does not effectively degrade. Noise and intermodulation performance of different amplitude control methods as well as the required resolutions for D/A converters are investigated.

An antenna diversity MMIC vector modulator for HIPERLAN with low power consumption and calibration capability

The design and performance of a vector-modulator-based phase shifter for high-performance radio local area networks at 5.2 GHz is presented in this paper. Low power consumption is achieved using a 0.6-/spl mu/m GaAs MESFET process. At a voltage supply of 1.4 V and with a current consumption between 3.5-7 mA, the gain is 0.6 dB and the 1-dB input compression point is -9 dBm. A full 360/spl deg/ phase control range is achieved by combining two of the three vectors, which have phase offsets of 120/spl deg/, with variable amplitude. Chip size is only 1.3 mm/sup 2/. The proposed vector modulator applies a new circuit configuration of variable-gain amplifiers to compensate their transmission phase errors. Within a gain control range of 20 dB, the phase error can be reduced to /spl plusmn/3/spl deg/, which is about a factor of eight better than the results obtained by single FET amplifiers. A simple calibration procedure for the proposed vector modulators is presented to improve the manufacturing yield and to decrease the impact due to temperature changes and aging. A maximum gain error of /spl plusmn/0.8 dB and a maximum phase error of /spl plusmn/7/spl deg/ have been measured after applying this calibration to the designed vector modulator.

A 6.5-mW receiver front-end for Bluetooth in 0.18-/spl mu/m CMOS

This paper describes the design of a low-IF receiver front-end for Bluetooth fabricated in a 0.18 /spl mu/m CMOS technology. The chip includes an LNA and an image-reject mixer and provides a down-conversion gain to the 2 MHz IF of 21.4 dB, an image rejection of 28 dB and a NF of 13.9 dB consuming only 6.5 mW at 1.8 V.

Design of a low-supply-voltage high-efficiency class-E voltage-controlled MMIC oscillator at C-band

In this paper, a monolithically integrated voltage-controlled class-E tuned oscillator for C-band has been designed and measured. Large-signal optimization was performed using analytically calculated starting values to reach high efficiencies at ultra-low supply voltages down to 0.9 V. The range of the tuning voltage is from 0 to the supply voltage. With a supply voltage of 1.8 V, an output power of 6.5 dBm, an efficiency of 43%, and a tuning range of 150 MHz is achieved at a center frequency of 4.4 GHz. With a supply voltage of only 0.9 V, the efficiency is 36%, with an output power of 1.1 dBm,and a tuning range of 80 MHz at a frequency of 3.6 GHz. Chip size is less than 1 mm/sup 2/.

Ultra low power GaAs MMIC low noise amplifier for smart antenna combining at 5.2 GHz

A switchable GaAs MMIC cascode low noise amplifier for smart antenna combining at 5.2 GHz (HIPERLAN) is presented using a standard 0.6 /spl mu/m MESFET process. A gain of 12.3 dB and a noise figure of 2.4 dB are measured, drawing only 1.2 mA from a 1 V supply. A gain/P/sub dc/ figure of merit of 10 dB/mW is achieved, which to our knowledge is the highest ever reported at C-band.

A switched-LNA in 0.18 /spl mu/m CMOS for Bluetooth applications

A 2.45 GHz switched low-noise amplifier (LNA), intended for use in an integrated Bluetooth receiver, was implemented in a standard 0.18 /spl mu/m CMOS process. The LNA is optimized for a fully integrated mixer stage, with a mixer-input capacitance of 150 fF. The amplifier provides a switchable gain (|S/sub 21/|/sup 2/) of 7 dB/-17 dB with a noise figure (NF) of 3 dB in a 50 /spl Omega/ measurement environment. The power consumption is 7.6 mW from a 1.8 V supply. The die area of the LNA is 0.79 mm/sup 2/.

A K band DRO in coplanar layout with dry and wet etched InP HEMTs

A DRO operating in the frequency range of 23.2-24.8 GHz was designed using InGaAs-InAlAs-InP HEMTs with dry and wet etched gate recess. The oscillator consisted of an MMIC in coplanar waveguide technology and an externally coupled mechanically tunable DR mounted on a microstrip line. An output power of 12 dBm and a phase noise of -107 dBc/Hz at 100 kHz offset from the carrier were measured. The achieved power efficiency was 21%.

A calibratable 4.8-5.8 GHz MMIC vector modulator with low power consumption for smart antenna receivers

A highly integrated 4.8-5.8 GHz vector modulator MMIC using a 0.6 /spl mu/m GaAs MESFET foundry process is presented. Variable gain amplifiers with amplitude control ranges of 35 dB are applied to enable continuous amplitude and phase control of 15 dB and 360/spl deg/ by combining three vectors with phase offsets of 120/spl deg/. Maximum gain is 0 dB. The maximum current consumption using a 2.7 V voltage supply is only 3.2 mA. A calibration procedure is proposed to significantly improve the yield and the operation bandwidth.

A monolithic integrated, on chip matched GaAs power amplifier for HIPERPLAN with a single 3.3v supply

For HIPERLAN a three stage monolithic integrated power amplifier was designed and realized with a single 3.3 V supply. In the frequency range of 5.15 to 5.3 GHz the MESFET amplifier delivers a saturated output power of 21.8 dBm and 19 dB gain at the ldB compression point. Full input and output on chip matching networks are included on a chip size of 1 mm × 2 mm

Low-Loss MESFET Frequency Quadrupler from 5 to 20 GHz

The design of a direct quadrupler of a 5 GHz input signal to 20 GHz, using a single 0.3 ¿m MESFET, is described. Aminimum conversion loss of 6.5 dB has been measured, including about 2 dB of insertion loss of the MIC output filter. Due to the isolation provided by the FET, the input and output matching circuits can be designed independently. No idler circuits for the 2nd and 3rd harmonics are required.