Frank Ellinger

26-42 GHz SOI CMOS low noise amplifier

A complementary metal-oxide semiconductor (CMOS) single-stage cascode low-noise amplifier (LNA) is presented in this paper. The microwave monolithic integrated circuit (MMIC) is fabricated using digital 90-nm silicon-on-insulator (SOI) technology. All impedance matching and bias elements are implemented on the compact chip, which has a size of 0.6 mm /spl times/ 0.3 mm. The supply voltage and supply current are 2.4 V and 17 mA, respectively. At 35 GHz and 50 /spl Omega/ source/load impedances, a gain of 11.9 dB, a noise figure of 3.6 dB, an output compression point of 4 dBm, an input return loss of 6 dB, and an output return loss of 18 dB are measured. The -3-dB frequency bandwidth ranges from 26 to 42 GHz. All results include the pad parasitics. To the knowledge of the author, the results are by far the best for a silicon-based millimeter-wave LNA reported to date. The LNA is well suited for systems operating in accordance to the local multipoint distribution service (LMDS) standards at 28 and 38 GHz and the multipoint video distribution system (MVDS) standard at 42 GHz.

Analysis and Compensation of Phase Variations Versus Gain in Amplifiers Verified by SiGe HBT Cascode RFIC

The transmission phase variations versus gain in common emitter and common base amplifiers are analyzed revealing that these stages can be tuned to yield opposite phase characteristics versus gain. By cascading these two stages, e.g., on the basis of a cascode, and optimizing added feedback elements, it is possible to compensate these phase variations. A universal analysis based on bipolar transistors is derived. However, the insights can be mapped to other transistors such as field-effect transistors. The analysis is verified by implementation of a low-noise cascode amplifier in 0.25-mum silicon germanium heterojunction bipolar transistors. At 50-Omega terminations, 1.6-V supply voltage, 1-mA current consumption, and a gain of 7 dB plusmn 0.25 dB, a noise figure of less than 3.2 dB, and a third-order output intercept point of -3 dBm are measured within a frequency range from 5.2 to 5.9 GHz. For a gain control range of 12 and 20 dB, the transmission phase variations are reduced to 3deg and 6deg, respectively, which is around a factor of 7 better than for a conventional noncompensated cascode topology. The fully integrated circuit is well suited for wireless local area network systems applying adaptive antenna combining and operating in accordance to the 802.11 a/n standards.

Local Positioning for Wireless Sensor Networks

This workshop paper gives an overview of local positioning and tracking principles for wireless sensor networks including recent results of the European project RESOLUTION (reconfigurable systems for mobile local communication and positioning). Measurements of a first demonstrator applying a frequency modulated continuous wave (FMCW) radar principle are presented. The unlicensed ISM band around 5.8 GHz, 150 MHz bandwidth and less than 25 mW effective isotropic radiated transmit power are used. Excellent 3-D positioning accuracies in the order of 4 cm in an anechoic chamber and 18 cm in a conference hall with strong multipath and area of 800 m2 are measured. Furthermore, the results of optimized radio frequency integrated circuits and a suitable compact flash card are outlined.

Analysis and Design of a Stacked Power Amplifier With Very High Bandwidth

In order to simplify and optimize the design process of stacked amplifiers, this paper presents a novel analytical method to dimension the input network for ideal output behavior. To verify this new structural design process, a fully integrated stacked power amplifier (PA) in 0.25-μm SiGe BiCMOS technology is proposed. The stacked architecture enables broadband matching networks, therefore the designed PA reaches a very high bandwidth of 800 MHz around 2 GHz. At 2 GHz, the small-signal gain is 23.8 dB. The output power in the 1-dB compression point and the saturated output power are 26.2 and 27.3 dBm, leading to a power-added efficiency (PAE) of 34% and 40%, respectively. Using a long-term evolution (LTE) modulated input signal without any predistortion, the amplifier reaches an average output power of 21 dBm and a PAE of 12%, fulfilling the LTE specifications in terms of adjacent channel leakage ratio and error vector magnitude.

A Compact, Low-Power 40-GBit/s Modulator Driver With 6-V Differential Output Swing in 0.25-

This paper presents a high-speed, low-power modulator driver featuring a novel modified breakdown voltage doubler (BVD) topology. Further speed enhancement and reduction of power consumption is achieved by multiple frequency compensation methods. An optimization method combining small and large-signal analyses is presented. The driver was fabricated in a 0.25-μm SiGe BiCMOS technology with fT of up to 180 GHz. It features 13-dB differential gain, a small-signal bandwidth of 33.7 GHz and delivers a single-ended output swing of 3 Vpp (6 Vpp differential) at 40 GBit/s into a 50-Ω load consuming only 1.35 W of DC power.

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This letter presents a 200 GHz amplifier for low-power high data-rate wireless communications. With large bandwidth and energy efficiency as concurrent goals, cascode stages for high power gain and dual-band matching networks to maximize the bandwidth have been employed. The resulting amplifier has been implemented in a 450 GHz SiGe BiCMOS technology, requiring a circuit area of only 800 μm × 300 μm. The characterized circuit exhibits 16.9 dB of maximum power gain, 44 GHz of bandwidth and -3.5 dBm of output power at 1 dB compression, while requiring only 18 mW of DC-power.

m SiGe BiCMOS

Phase variations of variable gain cascode amplifiers are analysed and a method, which significantly reduces the phase variations versus gain is presented. The operation point current and the load of the variable gain transistors are stabilised by current weighting using dummy paths. The approach is verified by a fully integrated CMOS variable gain amplifier at C-band. A maximum gain of 18 dB with a 1 dB bandwidth of 5.2-5.7 GHz is measured. At 5.7 GHz and within a gain control range of 23 dB the absolute phase difference is reduced to a minimum of ± 4° yielding an improvement by a factor of 5 compared with simple cascode topologies. A total supply power of 9 mW is consumed. A very low phase variation has been achieved at comparable gain control range and power consumption for a variable gain amplifier in CMOS.

A Broadband 200 GHz Amplifier with 17 dB Gain and 18 mW DC-Power Consumption in 0.13

This paper presents an indoor localization system based on a frequency modulated continuous wave radar in the industrial-scientific-medical band at 5.8 GHz. An integrated active pulsed reflector behaves as a backscatter by regenerating the incoming phase with phase coherent startup at a constant frequency. The base station (BS) determines the distance to this reflector with a round-trip time-of-flight measurement. The active pulsed reflector is built around a switchable and tunable oscillator. The circuit has been fully integrated in a 0.18-¿m CMOS technology. Outdoor measurements revealed a positioning accuracy of 15 cm, while in a harsh multipath environment with omnidirectional antennas a positioning accuracy of 32.88 cm was measured. The localization system is capable of detecting multiple reflectors at the same time, and no synchronization between BSs is needed.

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RESOLUTION aims at developing a wireless three-dimensional (3-D) local positioning system with measurement accuracy in the centimetre regime and real-time ability. A novel frequency modulated continuous wave (FMCW) radar principle with pulsed active reflector is employed. This High-Precision-Localisation-System (HPLS) will be implemented together with common WLAN systems that are used for data communication purposes. Due to its high data rate capabilities and large potential bandwidth, the 802.11a/n standard allocated bandwidth around 5.5 GHz is applied. Special emphasis is given to the systems reconfigurability by efficiently using inherent synergies between the WLAN system and the HPLS approach. To allow multifunctional tasks, highly integrated system on chip (SoC) frontends will be designed on advanced CMOS or BiCMOS technology. Smart power and adaptive performance control will be applied to minimise the power consumption according to application needs. In order to enhance performance and coverage range, the transceiver features adaptive antenna combining (AAC) in the radio frequency (RF) receiver. AAC significantly decreases the power consumption, size and costs, since the number of multiple components is reduced to a minimum. Because of the high 3-D resolution and real-time ability, which can be achieved in indoor environments with strong multipath effects and fading, novel local positioning applications, e.g. for smart factories, robotics, interactive guiding, object tracking and augmented reality are presumably leading to a large economic potential.

m SiGe BiCMOS

In this paper, a fully integrated active backscatter transponder based on the switched injection-locked oscillator (SILO) principle for frequency-modulated continuous-wave radar applications is presented. Furthermore, a method to characterize a SILO amplifier is extended and utilized to measure the system parameters of the presented backscatter tag that operates at 34.45 GHz. It is digitally tunable from 32.7 to 35.4 GHz and reaches an unpulsed output power of 5 dBm. Above injection power levels of