Valentin Obac Roda

Intelligent FPGA based system for shape recognition

Mathematical morphology supplies powerful tools for low level image analysis, with applications in many areas. In this paper, the development of a novel reconfigurable hardware using a genetic algorithm and a pipeline architecture is proposed for the task of shape recognition in binary images. For the recognition process, a large sized convex structuring element representing the object shape to be recognized is decomposed into the architecture stages. Each stage can handle structuring elements of a limited size. In this approach, a genetic algorithm was used to decompose this structuring element. Thus, a simple erosion performed in each stage is used to detect the goal object. The hardware is capable of processing binary images at high speed. The developed system is based on FPGAs. Our approach represents an intelligent mechanism to reconfigure the pipeline architecture, it is different from other systems found in the literature, and the obtained results are promising.

Architecture for binary mathematical morphology reconfigurable by genetic programming

Mathematical morphology supplies powerful tools for low level image analysis, with applications in robotic vision, visual inspection, medicine, texture analysis and many other areas. Many of the mentioned applications require dedicated hardware for real time execution. In this paper, the development of a novel reconfigurable hardware using logical and morphological instructions generated automatically by a linear approach based on genetic programming is proposed. The hardware is capable of processing binary images at high speed. The developed system is based on high-capacity PLDs and has among the possible applications: automatic construction of image filters, intelligent pattern recognition, to name just a few. Some applications using the developed reconfigurable system are presented and the results are discussed and compared with other approaches.

A genetic programming approach to reconfigure a morphological image processing architecture

Mathematical morphology supplies powerful tools for low-level image analysis. Many applications in computer vision require dedicated hardware for real-time execution. The design of morphological operators for a given application is not a trivial one. Genetic programming is a branch of evolutionary computing, and it is consolidating as a promising method for applications of digital image processing. The main objective of genetic programming is to discover how computers can learn to solve problems without being programmed for that. In this paper, the development of an original reconfigurable architecture using logical, arithmetic, and morphological instructions generated automatically by a genetic programming approach is presented. The developed architecture is based on FPGAs and has among the possible applications, automatic image filtering, pattern recognition and emulation of unknown filter. Binary, gray, and color image practical applications using the developed architecture are presented and the results are compared with similar techniques found in the literature.

A hardware oriented ad-hoc computer-based method for binary structuring element decomposition based on genetic algorithms

Mathematical morphology (MM) is a popular formalism largely used for image processing. Of particular relevance in MM-based operations is the structuring element (SE). In an image processing environment SE defines which pixel values, in the input image, to include in the calculation of the output value. Most MM-based image processing environments employ limited size SEs which prevents their use in tasks requiring larger SEs. This paper proposes a computer-based method for optimizing the decomposition of SEs, in binary image related tasks, that employs binary MM, which automatically transforms an original SE into a corresponding sequence of 3 × 3 SEs. The decomposition operation reduces the complexity of the morphological operations and has been implemented as a genetic algorithm (GA) based process, that searches for the best sequence of smaller structuring elements, using one dilation and four union operations, for the decomposition of each large-sized structuring element. By using a GA with a fixed-length chromosome as well as a fixed number of dilation and union operations, the method has a simple and fixed structure, which makes it a convenient choice for hardware implementations. Its performance, based on six images already used in the literature by other well-established method, has shown to be competitive.

Robust estimation of 3D trajectories from a monocular image sequence

This article describes a new method for object trajectory estimation that uses sequences of images taken from a monocular camera. The method integrates a Kalman filter to estimate the three‐dimensional (3D) parameters of the optical system and a lineal projective model to determine 3D point coordinates projected on the retinal plane. It works with at least three distinctive points in the image, and they are updated with correlation methods. The result is an estimation of the rotation and translation parameters between successive images within the sequence and yield to the 3D coordinates of the points selected for correspondence. The scaling problem related to 3D reconstruction is tackled via a priori information of the objects being observed. The method is tested with synthetic images to evaluate its accuracy, and later, an interesting application in autonomous navigation is presented.

Chopper-controlled PMDC motor drive using VHDL code

In many industrial applications it is necessary to convert a constant-voltage dc (direct current) source into a variable-voltage/variable-current source for the speed control of the dc motor drive. The variable dc voltage is controlled by chopping the input voltage by varying the on and off times of a converter, and the type of converter capable of such a function is known as a chopper. This work presents a chopper control using VHDL (very high speed integrated circuit hardware description language - VHSIC-HDL) language to control a PMDC motor (permanent magnetic direct current). The simulation is performed using two programs: MATLAB/Simulink and ModelSim, working in a co-simulation mode, provided by Link for ModelSim toolbox from Simulink. While the motor and inverter dynamics is performed in MATLAB, the control algorithm of the chopper runs in the ModelSim program. The simulation results are presented and analyzed in this work.

Real-time morphological pipeline architecture using high-capacity programmable logical devices

Mathematical morphology is a very important image analysis area that uses set theory tools to study shapes. The basic operations in mathematical morphology are dilation and erosion, and these can be used to construct more complex operations. Low-level image processing often uses dedicated computing hardware for repetitive processing over large data structures. High-capacity programmable logic devices (HCPLDs) have increasingly been used for the fast development of real-time image processing systems. In this paper we present a pipeline architecture, using high-capacity programmable logic devices, for real-time mathematical morphology operations. The developed architecture can process (512×512) pixel binary images and has flexible stages that can be reprogrammed according to the shape and size of the structuring elements used in the morphological operations. Tests performed over the architecture demonstrated that it performs well when compared to similar architectures and that it is an efficient choice for dedicated morphological image processing operations.

Non Linear Algorithm for Automatic Image Processing Applications in FPGAs

Mathematical morphology supplies powerful tools for low-level image analysis. The design of morphological operators for a given application is not a trivial one. For some problems in low level image processing the best result is achieved applying to the image an ordered sequence of morphological operators, that can be done manually, but is not easy and not always leads to the best solution. Genetic programming (GP) is a branch of evolutionary computing, and it is consolidating as a promising method for applications of digital image processing. The main objective of genetic programming is to discover how computers can learn to solve problems without being programmed for that. In the search for a practical automatic solution for low level image processing using mathematical morphology and genetic programming we present in this chapter a Matlab algorithm used for this purpose. Two sample images feed the Matlab application, the first one the original image with all defects, the second one the goal image where the defects of the original image were corrected. If we want to find the mathematical morphology operators that implement a certain filter that removes specific noise from the image, we supply a noisy image and an image were the noise was removed. The second image can be obtained from the noisy image applying an image manipulation program. After the parameters are supplied to the Matlab algorithm, the developed program starts to search for the sequence of morphological operators that leads to the best solution. The program works iteratively, and at each iteration compares the result of the morphological operations applied to the image set with the previous ones. To quantify how good is the solution at each iteration the resulting image is compared with the reference image using the mean absolute error (MAE) of the pixels. The best solution of the process is the image from a certain set whose error is less than a reference error indicated to the function. Using this methodology it was possible to solve a number of low level image processing problems, including edge detection, noise removal, separation of text from figures, with an error less than 0.5%, most of the time. Examples are presented along the text to clarify the use of the proposed algorithm. In addition, the sequence of operators obtained by the Matlab procedure was used to reconfigure an hardware architecture implemented in FPGAs to process images with the generated instructions in real time.

A reconfigurable general framework for pipelined image processing: A color mathematical morphology application

In this paper a reconfigurable general framework for pipelined fast image processing is presented The system is capable of processing, in real time, video with resolution of 640 × 480 pixels at the speed of 60 frames per second. The video is supplied to the framework by means of a color video camera. As an application of the framework, the basic operators of mathematical morphology are implemented on the RGB color space. The processed images can be displayed by any display system compatible with the standard composite video. The results obtained using the developed framework are compared with a Matlab implementation.

Reconfigurable architecture for binary images invariant moment extraction

Moments of the intensity function of a group of pixels have been used fo rthe representation and recognition of objects in two dimensional images. Due to the high computational cost of evaluating the moments, the search for faster computing architectures is very important. This work presents a soft core architecture for the extraction of invariant moments from binary images, using high density logic programmable devices.