Vanderlei Bonato

A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection

This paper proposes a parallel hardware architecture for image feature detection based on the scale invariant feature transform algorithm and applied to the simultaneous localization and mapping problem. The work also proposes specific hardware optimizations considered fundamental to embed such a robotic control system on-a-chip. The proposed architecture is completely stand-alone; it reads the input data directly from a CMOS image sensor and provides the results via a field-programmable gate array coupled to an embedded processor. The results may either be used directly in an on-chip application or accessed through an Ethernet connection. The system is able to detect features up to 30 frames per second (320times240 pixels) and has accuracy similar to a PC-based implementation. The achieved system performance is at least one order of magnitude better than a PC-based solution, a result achieved by investigating the impact of several hardware-orientated optimizations on performance, area and accuracy.

An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics

The problem of simultaneous localization and mapping has been studied by the mobile robotics scientific community over the last two decades. Most solutions for this problem are based on probabilistic theory in order to represent the uncertainty in robot perception and action. One of the most efficient probabilistic methods is the extended Kalman filter (EKF). However, the EKF demands a considerable amount of computing power and is usually processed by high-end laptops coupled to the robots. In this work, we present an implementation of the EKF targeting an embedded system based on an FPGA device. In order to improve performance, our approach combines a softcore processor with customized hardware. We present experiments with four different FPGA implementations, being the first purely based on software, the second using custom instruction logic directly connected to the processors ALU, the third using hardware accelerators connected to the processors data bus, and finally the fourth combining those two hardware/software solutions. For the experiments conducted, the results obtained with a small addition of hardware resources permitted to increase from 2times to 4times the performance of the global system.

A Floating-Point Extended Kalman Filter Implementation for Autonomous Mobile Robots

Localization and mapping are two of the most important capabilities for autonomous mobile robots and have been receiving considerable attention from the scientific computing community over the last 10 years. One of the most efficient methods to address these problems is based on the use of the extended Kalman filter (EKF). The EKF simultaneously estimates a model of the environment (map) and the position of the robot based on odometric and exteroceptive sensor information. As this algorithm demands a considerable amount of computation, it is usually executed on high end PCs coupled to the robot. In this work we present an FPGA-based architecture for the EKF algorithm that is capable of processing two-dimensional maps containing up to 1.8k features at real time (14 Hz) and is two orders of magnitude more power efficient than a general purpose processor.

An Embedded Multi-camera System for Simultaneous Localization and Mapping

This paper presents an embedded multi-camera system for Simultaneous Localization and Mapping (SLAM) for mobile robots. The multi-camera system has been designed and implemented as a SoC (System-on-a-Chip), using reconfigurable computing technology. In this system the images are captured in real-time by means of four CMOS digital cameras. After some pre-processing steps, those images are sent to an embedded softcore processor by a direct memory access (DMA) channel. In this system, images are captured, pre-processed and sent to the embedded processor at 30 frames per second in color mode and 60 frames per second in gray-scale mode. This paper also shows the main advantages of using multi-cameras to implement SLAM based on the Extended Kalman Filter.

A tool to support Bluespec SystemVerilog coding based on UML diagrams

The use of high level languages to support the development of embedded systems is a current trend. Such approach tends to reduce the development time and cost. The process of translating a high level representation to the final hardware and software architecture is desirable to be automatic encompassing as much as possible the requirements specified in high level model. This work proposes a new tool to support Bluespec SystemVerilog code generation based on models represented via Activity and State UML diagrams. The tool accepts as input the XMI format and the generation process is based on templates where the target language is represented.

An FPGA-Based Mobile Robot Controller

Mobile robotics and embedded systems are two research areas that have been receiving a considerable attention in years. Combining these two research topics is a very interesting and promising task. Some of the problems of controlling robots using embedded systems are designing device drivers, provide network communication, and develop complex control algorithms under hardware limitations. Player is one of the most used controllers for mobile robots and sensors. It has been widely used by the robotics community. This paper presents an embedded implementation of Player client mobile robot using the NIOS II softcore. Our client has been experimentally tested on a FPGA board and compared to a standard PC implementation.

A smart camera with gesture recognition and SLAM capabilities for mobile robots

This paper presents a smart camera for a real-time gesture recognition system. The smart camera has been designed and implemented as a system-on-a-chip (SoC), using reconfigurable computing technology. In this system the gesture images are captured by means of a CMOS digital camera. After some pre-processing steps, those are sent to a fault tolerant module (FTM) for the actual recognition process. The FTM implements a RAM-based neural network, using three knowledge bases. In addition, a majority voting technique is used to improve the confidence level in the recognition step. A number of experiments using a prototype implementation and selected gestures resulted in a rate of 100% true recognition. The system also showed to be robust, and flexible as new gesture patterns can be easily included by means of the on-chip training capabilities. An application for this systems is also presented, consisting of four smart cameras used in simultaneous localization and mapping (SLAM) tasks for robotics.

A Mersenne Twister Hardware Implementation for the Monte Carlo Localization Algorithm

Mobile robot localization is the problem of estimating a robot position based on sensor data and a map of the environment. One of the most used methods to address this problem is based on the Monte Carlo Localization (MCL) algorithm, which is a sample based state estimation that offers some advantages over the traditional Gaussian method. This work presents an embedded system based on an FPGA (Field-Programmable Gate Array), customized to compute the complete MCL algorithm in a response time compatible with real mobile robot applications. At the core of the system is the Mersenne Twister pseudo-random number generator, used to spread random particles over the robot navigation map. Experimental results have shown that the proposed hardware architecture is able to generate 125M numbers of 32bits/sec and that for 1k features each MCL iteration takes 0.27 sec. Additionally, this paper provides some evidences about the impact caused by the choice of random number generator on the MCL algorithm convergence speed.

A Parallel Hardware Architecture for Image Feature Detection

This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architecture receives as input a pixel stream read directly from a CMOS image sensor and produces as output the detected features, where each one is identified by their coordinates, scale and octave. In addition, the proposed hardware also computes the orientation and gradient magnitude for every pixel of one image per octave, which is useful to generate the feature descriptors. This work also presents a suitable parameter set for hardware implementation of the SIFT algorithm and proposes specific hardware optimizations considered fundamental to embed whole system on a single chip, which implements in parallel 18 Gaussian filters, a modified CORDIC (COordinate Rotation DIgital Computer) algorithm version and a considerable number of fixed-point operations, such as those involved in a matrix inversion operation. As a result, the whole architecture is able to process up to 30 frames per second for images of 320×240 pixels independent of the number of features.

RoboArch: A component-based tool proposal for developing hardware architecture for mobile robots

This paper introduces a component-based tool proposal for developing hardware architecture for mobile robots at ESL (Electronic System-Level) based on reusable IP (Intellectual Property) cores. This tool, denominated RoboArch, provides a platform independent development environment where embedded systems are created in a visual environment from IP component libraries specified according to the IP-XACT XML (Extensible Markup Language) schema, where a component can be a softcore processor, a dedicated hardware module or a high level model described in a non-synthesizable code. The systems developed in this visual programming environment can be either simulated directly at ESL (Electronic System-Level) using external environments for stimulus generation and result monitoring or synthesized for a hardware description representation at RTL (Register Transfer Language), allowing its implementation on FPGA (Field-Programmable Gate Array).