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Venugopal Boynapalli

Qualcomm

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Publication

Featured researches published by Venugopal Boynapalli.

Archive | 2016

High-speed level-shifting multiplexer

Kevin Robert Bowles; Jose Gabriel Corona; Venugopal Boynapalli

Archive | 2010

System and Method of Testing an Error Correction Module

Hari M. Rao; Shahzad Nazar; Venugopal Boynapalli

Archive | 2017

LOW-AREA LOW CLOCK-POWER FLIP-FLOP

Seid Hadi Rasouli; Xiangdong Chen; Venugopal Boynapalli

Archive | 2013

Method and apparatus for dynamic power saving with flexible gating in a cross-bar architecture

Hari Rao; Venugopal Boynapalli; Kevin Robert Bowles; Vijay Bantval

Archive | 2013

POWER GATING FOR HIGH SPEED XBAR ARCHITECTURE

Hari M. Rao; Esin Terzioglu; Venugopal Boynapalli

Archive | 2018

Semi-data gated flop with low clock power/low internal power with minimal area overhead

Seid Hadi Rasouli; Xiangdong Chen; Venugopal Boynapalli

Archive | 2018

CLOCK GATING CELL FOR LOW SETUP TIME FOR HIGH FREQUENCY DESIGNS

Seid Hadi Rasouli; Xiangdong Chen; Venugopal Boynapalli

Archive | 2016

Pulse-stretcher clock generator circuit for high speed memory subsystems

Dorav Kumar; Venkat Narayanan; Bilal Zafar; Seid Hadi Rasouli; Venugopal Boynapalli

Archive | 2015

Registre de réparation partagé pour redondance de mémoire

Venugopal Boynapalli; Bilal Zafar

Archive | 2015

Source separated cell

Satyanarayana Sahu; Xiangdong Chen; Venugopal Boynapalli; Hyeokjin Bruce Lim; Mukul Gupta; Hananel Kang; Chih-Lung Kao; Radhika Vinayak Guttal

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Collaboration

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Bilal Zafar

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Seid Hadi Rasouli

Qualcomm

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Xiangdong Chen

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Esin Terzioglu

Qualcomm

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Sei Seung Yoon

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Chulmin Jung

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Hari Ananthanarayanan

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Hari M. Rao

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Hari Rao

Qualcomm

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Kevin Robert Bowles

Qualcomm

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